Linking Field-Programmable Gate Arrays to LINUX Box Marcus Baines Norfolk State University August 14, 2008 Mentor: Ryan Herbst
Contents What are FPGAs? The Pretty Good Protocol(PGP) Raw Ethernet Frames Replaced MAC Address The Hardware Interface The Software Interface Setup Before the New Code Setup After the New Code
What are FPGAs? Field-Programmable Gate Arrays are semiconductor devices that contain many programmable logic blocks and programmable interconnects.
The Pretty Good Protocol The PGP supports movement of data across a high-speed communications link over four independent virtual channels. Each channel appears as a separate set of interface signals to the FPGA hardware and are broken down into transmit and receive signals.
Raw Ethernet Frames Bytes 0 to 5: Destination MAC Address Bytes 6 to 11: Source MAC Address Bytes 12 and 13: Protocol Bytes 14 and on: Payload(User) Data
Replaced MAC Address Byte 1: Serial(Sequence) Number Byte 2: Serial Number Byte 3: Frame Type [Null, Poll, Read, Write] Byte 4: Virtual Channel and Frame[SOF, EOF, EOFE, Error] Byte 5: Size of Data Byte 6: Size of Data
The Hardware Interface Reads Header and makes decision based on frame type. May pass data onto the user. May make a read request to retrieve data. May make an ACK request to a received frame. Generates the Header of the new outgoing frame. Places data in required field.
The Software Interface Opens Ethernet link. Receives and transmits frames to and from the user logic in the FPGA. If required, breaks data up and sends in multiple frames.
Setup Before the New Code Supports three smaller 64 channel Kpix ASICs
Setup After the New Code Next version of KPIX will contain 1024 channel ASICs. The new code allows many more devices of a larger density.
Acknowledgements References Special Thank You to Ryan Herbst, Steve Rock, Farah Rahbar, Susan Schultz, and Department of Energy for making this a wonderful experience. References Nicolle, Jean P. April. 2008. What are FPGAs? [Online]. FPGAs 4 Fun. http://www.fpga4fun.com/FPGAinfo1.html Wikipedia. July. 2008. Field-Programmable Gate Arrray. [Online]. Wikimedia Foundation, Inc. http://en.wikipedia.org/wiki/Field-programmable_gate_array Herbst, Ryan. PGP Over Ethernet. PDF. June. 2008. unpublished. Pellerin, David and Douglas Taylor. VHDL Made Easy! Prentice Hall PTR, New Jersey. 1997.