William Stallings Computer Organization and Architecture 6th Edition

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Presentation transcript:

William Stallings Computer Organization and Architecture 6th Edition Chapter 11 Instruction Sets: Addressing Modes and Formats

Register Indirect Addressing Displacement Addressing Addressing Modes Immediate Addressing Direct Addressing Indirect Addressing Register Addressing Register Indirect Addressing Displacement Addressing Relative Addressing Base-Register Addressing Indexed Addressing Stack Addressing 2

Operand is part of instruction Operand = address field e.g. ADD 5 Immediate Addressing Operand is part of instruction Operand = address field e.g. ADD 5 Add 5 to contents of accumulator 5 is operand No memory reference to fetch data Fast Limited range 3

Immediate Addressing Diagram Instruction Opcode Operand 4

Address field contains address of operand Direct Addressing Address field contains address of operand Effective address EA = address field A e.g. ADD A Add contents of cell A to accumulator Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space 5

Direct Addressing Diagram Instruction Opcode Address A Memory Operand 6

Indirect Addressing (1) Memory cell pointed to by address field contains the address of (pointer to) the operand EA = (A) Look in A, find address (A) and look there for operand e.g. ADD (A) Add contents of cell pointed to by contents of A to accumulator (X) : Content of location X or register X 7

Indirect Addressing (2) Large address space 2N where N = word length May be nested, multilevel, cascaded e.g. EA = (((A))) Draw the diagram yourself Multiple memory accesses to find operand Hence slower 8

Indirect Addressing Diagram Instruction Opcode Address A Memory Pointer to operand Operand 9

Register Addressing (1) Operand is held in register named in address filed EA = R Limited number of registers Very small address field needed Shorter instructions Faster instruction fetch 10

Register Addressing (2) No memory access Very fast execution Very limited address space Multiple registers helps performance Requires good assembly programming or compiler writing N.B. C programming register int a; c.f. Direct addressing 11

Register Addressing Diagram Instruction Opcode Register Address R Registers Operand 12

Register Indirect Addressing C.f. indirect addressing EA = (R) Operand is in memory cell pointed to by contents of register R Large address space (2N) One fewer memory access than indirect addressing 13

Register Indirect Addressing Diagram Instruction Opcode Register Address R Memory Registers Pointer to Operand Operand 14

Displacement Addressing EA = A + (R) Address field hold two values A = base value R = register that holds displacement or vice versa 15

Displacement Addressing Diagram Instruction Opcode Register R Address A Memory Registers Pointer to Operand + Operand 16

A version of displacement addressing R = Program counter, PC Relative Addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) i.e. get operand from A cells from current location pointed to by PC c.f locality of reference & cache usage 17

Relative Addressing Instruction Opcode Address A Memory PC + Operand

Base-Register Addressing A holds displacement R holds pointer to base address R may be explicit or implicit e.g. segment registers in 80x86 18

Good for accessing arrays Indexed Addressing A = base R = displacement EA = A + (R) Good for accessing arrays (R) = (R) +1 19

Combinations Postindex EA = (A) + (R) Preindex EA = (A+(R)) (Draw the diagrams) 20

Postindex: EA = (A) + (R) Instruction Address A Opcode Register R Memory Registers Base Displacement + Operand

Preindex: EA = (A+(R)) Instruction Opcode Register R Address A Memory Base Registers Displacement + Pointer to Operand Operand

Operand is (implicitly) on top of stack e.g. Stack Addressing Operand is (implicitly) on top of stack e.g. ADD Pop top two items from stack and add 21

IA-32 (Pentium 4) Registers http://www.intel.com/design/processor/manuals/253665.pdf Streaming SIMD Extensions MMX: SIMD instruction set

purposes in different

Pentium Addressing Modes Virtual or effective address is offset into segment Starting address plus offset gives linear address This goes through page translation if paging enabled 12 addressing modes available Immediate Register operand Displacement Base Base with displacement Scaled index with displacement Base with index and displacement Base scaled index with displacement Relative

Pentium Addressing Mode Calculation

Pentium Instruction Format