Floating-Gate Circuits, Systems, and Adaptation Paul Hasler Integrated Computational Electronics (ICE) Laboratory Laboratory for Neural Engineering Georgia Institute of Technology

Things I don’t needed to cover Why use subthreshold devices? or can’t everything be built from op-amps and resistors? What are Floating-gate circuits? Why use neurobiology as inspiration for engineering systems? Where will this be used in an RF application?

Where we work

Laboratory for Neural Engineering Faculty: Robert Butera, Robert Cargill, Steve Deweerth, Bill Ditto, Paul Hasler, Michelle LaPlaca Key Directions: Neural Interfacing / Implants Hybrid Neural-Silicon Systems / Computations Neuromorphic Engineering

Top-Level View Neurons Interface Circuitry Sensor Circuits, etc.

After three years, what am I up to? Yet more Floating-Gate Research: Industrial Strength Circuits Cooperative Analog-Digital Signal Processing Silicon Learning Neural Modeling Building a single realistic neuron / small networks on a single IC (Density is key)

Overview of Floating-Gate Devices Information Storage Floating-Gate Transistor Modifying Floating-Gate Charge UV photo-injection Electron tunneling Hot-electron injection

Floating-Gate pFET Device Three Classes of Applications 1. Analog or Digital Memory 2. Floating-Gate Circuits 3. Adaptive Circuits

World of Floating-Gate Circuits

E-Pots R. Harrison, A. Bragg, and P. Hasler

Capacitor-Based Circuits Resistor-Based Design Capacitor-Based Design Resistors and Inductors define the circuit dynamics Capacitors and Inductors define the circuit dynamics Capacitors are the natural elements on silicon ICs

Where to divide Analog and Digital? Real world (analog) Compter (digital) A/D Convertor DSP Processor Specialized A/D Real world (analog) DSP Processor Compter (digital) ASP IC A/D

Low-Power Handheld Systems Sensor Signals ASP IC DSP IC Hasler and Anderson

Analog Computing Arrays

Current Directions Analog Side Signal Processing Demonstrate Larger Computational Blocks Generalize both analog and digital approaches in one framework. Develop design tools Reaching Industrial Specs / Reliability

Fourier-Based Programmable Filters Vin Bandpass Filters, Exp Spaced (Hard in DSP) W11 W12 W13 W14 W15 W1n W21 W22 W23 W24 W25 W2n Iout1 Iout2 Programmable Analog Filter C4 filters

Basic Programming Structure

Programmable Filter Individua l Bandpa ss Output A-rms) Filter Outp ut 1 10 10 Individua l Bandpa ss Output A-rms) Filter Outp ut -1 10 10 m Ampli er ( Filt tude o urier -1 10 10 -2 f Band of Fo itude pass F Fourier Filter Output ilter Ampl (V Output -2 10 -3 10 -rms ) -3 10 -4 10 10 10 1 10 2 10 3 10 4 10 5 Frequen cy (Hz)

Cepstrum Computation Iout1 Cepstrum Coefficients Ioutm Vin Bandpass Filters, Exp Spaced (Hard in DSP) Log(Amplitude) Fundamental Brick W11 W12 W13 W14 W15 W1n Iout1 Cepstrum Coefficients W21 W22 W23 W24 W25 W2n Ioutm DCT Coefficients

Single-Transistor pFET Synapses Computation Performed Vo = S Wi Vi i Adaptation Performed i = - 2 Vi e W Density / elegance is critical to large scale systems

Hot-Electron Injection Injection Current is proportional to source current Floating-Gate Voltage 4.351V 4.319V 4.280V 4.352V p + p + n

Autozeroing Floating-Gate Amplifier (AFGA)

Dynamics of pFETs and sd-pFETs Source-Degenerated Floating-Gate pFET pFET circuit has unstable dynamics sd pFET circuit has stable dynamics

Gate-Drain Weight Correlation 1.7 Inputs: Vg = V1 sin wt Vd = V2 sin(wt + q) 1.65 1.6 Vd ampl itude = 0.1896V 1.55 1.5 Sweep q Weight 1.45 Vd ampl itude = 1.4 0.1264V Fix V1, V2 (two V2 amplitudes) 1.35 Weq  - E[ Vd Vg ] = - V1 V2 cos(q) 1.3 1.25 1.2 50 10 15 20 25 30 35 Phase dif ference

Drain-Gate Dynamic Equation W = 1 -hE[Vg Vd] - eW

A Floating-Gate Adaptive Node + di bl tu n 1 2 N I d Adap tive Arr ay - V tu n - V di bl - - - I 1 I 2 I N -V -V 1 2 -V N I = I + - - I Progr ammed Arra y J. Dugger and P. Hasler

Correlation Data from a Node cos(wt) sin(wt) sin(wt + q) 0.5 Synapse 1 Current (mA) -0.5 0.5 Synapse 2 Current (mA) -0.5 50 100 150 200 250 300 350 degrees

Synapse Weight Solution / Convergence sin(wt) sin(3wt) Desired signal sin(0.7wt) sin(wt) sin(3wt) sin(wt) t = 6.5s

Learning a Square Wave square(wt) sin(wt) sin(3wt) Output Current (mA) 10 20 30 40 50 60 70 80 90 -2 -1 1 2 3 Output Current (mA) Tim e ( ms) 200 400 600 800 1k 1.2k 1.4k 1 2 3 4 5 6 7 Frequenc y (Hz) Outpu t Cur rent (mA)

Conclusions Floating-Gate Devices / Circuits are starting to move towards the system level, and are moving towards industrial standards / not user hostile We can not only build adaptive Floating-Gate circuits, but floating-gate circuits that adapt as a function of input “statistics”. Floating-gate Systems are becoming important tools in neuromorphic modeling