National Taiwan University

Slides:



Advertisements
Similar presentations
EXPLORING QUANTUM DOTS
Advertisements

by Alexander Glavtchev
Anodic Aluminum Oxide.
ECE G201: Introductory Material Goal: to give you a quick, intuitive concept of how semiconductors, diodes, BJTs and MOSFETs work –as a review of electronics.
VLSI Design Lecture 2: Basic Fabrication Steps and Layout
High-K Dielectrics The Future of Silicon Transistors
School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Course Tutor Dr R E Hurley Northern Ireland Semiconductor Research.
The planar Hall effect: sensor and memory applications Lior Klein Department of Physics, Bar-Ilan University The Itinerant Magnetism Laboratory – Department.
National Cheng Kung University Tainan, Taiwan. Japan 國立成功大學 National Cheng Kung University (NCKU) 台北 Taipei 高雄 Kaohsiung 台中 Taichung Where is NCKU?
CSCE 613: Fundamentals of VLSI Chip Design Instructor: Jason D. Bakos.
Introduction Integrated circuits: many transistors on one chip.
ELE 523E COMPUTATIONAL NANOELECTRONICS W1: Introduction, 8/9/2014 FALL 2014 Mustafa Altun Electronics & Communication Engineering Istanbul Technical University.
Z. Feng VLSI Design 1.1 VLSI Design MOSFET Zhuo Feng.
National Science Foundation Material for Future Low-Power Electronics Daniel Gall, Rensselaer Polytechnic Institute, DMR Outcome: Researchers at.
MonolithIC 3D Inc., Patents Pending MonolithIC 3D ICs RCAT approach 1 MonolithIC 3D Inc., Patents Pending.
VFET – A Transistor Structure for Amorphous semiconductors Michael Greenman, Ariel Ben-Sasson, Nir Tessler Sara and Moshe Zisapel Nano-Electronic Center,
Tamer Ragheb ELEC 527 Presentation Rice University 3/15/2007
CAD for Physical Design of VLSI Circuits
Strained Silicon MOSFET R Jie-Ying Wei Department of Electrical Engineering and Graduate Institute of Electronics Engineering National Taiwan University,
Fabrication of oxide nanostructure using Sidewall Growth 田中研 M1 尾野篤志.
1 BULK Si (100) VALENCE BAND STRUCTURE UNDER STRAIN Sagar Suthram Computational Nanoelectronics Class Project
Feb 2007Stith1 Semiconductors Material, Components, and Manufacture Joseph Stith February 2007.
Introduction to CMOS VLSI Design CMOS Fabrication and Layout Harris, 2004 Updated by Li Chen, 2010.
Professor F.L. Yang 楊富量 Director General National Nano Device Laboratories (NDL) No. 26, Prosperity Road 1, Hsinchu Science Park, Hsinchu, Taiwan 國家實驗研究院奈米元件實驗室.
National Science Foundation GOALI: Epitaxial Growth of Perovskite Films and Heterostructures by Atomic Layer Deposition and Molecular Beam Epitaxy John.
Introduction to Nano- computing for K-8 Students Sanjukta Bhanja and Javier Pulecio Assistant Professor, PhD student University of South Florida.
Negative Capacitance Devices to Enable Low- Voltage/Low-Power Switching In Electronic Devices John G. Ekerdt, University of Texas at Austin, DMR
Passivation of HPGe Detectors at LNL-INFN Speaker: Gianluigi Maggioni Materials & Detectors Laboratory (LNL-INFN) Scientific Manager: Prof. Gianantonio.
CMOS VLSI Fabrication.
Electromagnetically biased Self-assembly
CMOS FABRICATION.
EE 4611 INTRODUCTION, 13 January 2016 Semiconductor Industry Milestones Very pure silicon and germanium were manufactured PN junction diodes.
3D Technology and SRAM Simulation Advisor : Yi-Chang Lu Student : Chun-Yen Lin Graduate Institute of Electronics Engineering National Taiwan University.
Research Goal: We seek to measure and understand both self- and dopant diffusion in strained, relaxed, and ion implanted Ge and SiGe, utilizing isotopically-controlled.
Roughness and Electrical Resistivity of Thin Films Spencer Twining, Marion Titze, Ozgur Yavuzcetin University of Wisconsin – Whitewater, Department of.
Government Engineering College Bharuch Metal Oxide Semiconductor Field Effect Transistors{MOSFET} Prepared by- RAHISH PATEL PIYUSH KUMAR SINGH
Outline Introduction Module work on crystal re-growth velocity study
Lecture 1: Introduction DEE Spring
SEMICONDUCTOR DEVICE FABRICATION
• Very pure silicon and germanium were manufactured
ELE 523E COMPUTATIONAL NANOELECTRONICS
Funded by National Science Foundation
Graphene Based Transistors-Theory and Operation; Development State
LTFY – Physics and Engineering
ECE 695V: High-Speed Semiconductor Devices Peide (Peter) Ye Office: Birck Tel: Course website:
SEMINAR 1. Title : Solution-based Thin-film Formation of Carbon and Organic Materials for Field-Effect Transistors and Sensors 2. Speaker : Steve.
A high mobility III-V transistor demonstration for the
CMOS Fabrication CMOS transistors are fabricated on silicon wafer
National Taiwan University *
Design of AND and NAND Logic Gate Using
by Alexander Glavtchev
23 April 2001Doug Martin1 Diamond: A Story of Superlatives.
SEMINAR 1. Title : Introduction to Spintronics and III-V-OI MOSFET for Post-Si Technology Node 2. Speaker : Hyung-jun Kim (Center for Spintronics at KIST)
SEMINAR 1. Title : Non-volatile memory device and application
INTRO TO TDM AND BUM TDM – Top Down Manufacturing
Strained Silicon MOSFET
منبع: & کتابMICROELECTRONIC CIRCUITS 5/e Sedra/Smith
Chapter 10: IC Technology
Search for Superconductivity with Nanodevices
Lecture #25 OUTLINE Device isolation methods Electrical contacts to Si
INTRO TO TDM AND BUM TDM – Top Down Manufacturing
Chapter 10: IC Technology
Synthesis and Applications of Semiconductor Nanowires
ECE 695V: High-Speed Semiconductor Devices Peide (Peter) Ye Office: Birck Tel: Course website:
• Very pure silicon and germanium were manufactured
Metal Assisted Chemical Etching (MacEtch)
Chapter 10: IC Technology
Multiscale Modeling and Simulation of Nanoengineering:
Epitaxial Deposition
Presentation transcript:

National Taiwan University 優貝克討論會 Prof. M.-H. Liao (廖洺漢) National Taiwan University mhliaoa@ntu.edu.tw 2017/1 優貝克

M.-H. Liao (廖洺漢) Education: Experience: Research: http://www.me.ntu.edu.tw/main.php Education: Department of Mechanical Engineering, National Taiwan Uni. B.S. 1999-2003 Graduate Institute of Photonics and Opto-electronics, National Taiwan Uni. PhD. 2003-2007 (Advisor: Prof. CheeWee Liu) Experience: RD/TD, TSMC, 2007-2011 (A9 chip in Apple i-Phone 6s) Assistant/Associate professor, Department of Mechanical Engineering, National Taiwan Uni., 2011-Now Publish 30+ technical papers in top conference proceedings and international journals such as IEDM and VLSI, mainly in the field of advanced transistor developments along with 10+ patents. Demonstrate the high device performances of Ge (VLSI 2014)/III-V MOSFETs, steeper slope transistors with negative capacitance effect and low power consumption (IEDM 2015), vertical nano-wire/tube devices (JAP), and magnetic spin-electronics (VLSI 2014). Research: Semiconductor technology MEMS IoT Micron-NTU Day

Magnetic Logic Device and Cell (VLSI 2014) * VLSI 2014, By M.-H. Liao et.al. How to create the high built-in Magnetic field in the Metal Gate ? Different Sputter Chamber Design ? (With the External Magnetic Field ?) 優貝克

The enhancement of Melting point in Si/Ge The Melting point on Si and Ge is very critical for the semiconductor process/device (activation..). We are finding the way to extract it accurately and try to enhance it. How to enhance the melting point in Si and Ge ? Anneal with different pressure environment and different anneal/temperature arise rate is a solution ? 優貝克

Atomic Layer Deposition/Etching System Atomic Layer Deposition and Etching System is very important for the industry. If it is possible to grow the crystal Si and Ge by ALD System ? 優貝克

Local thermometry of self-heated nano-scale devices (Temperature Extraction) Tool Set-Up Demo- Principle How to measure the temperature in the nm-level space resolution is very important for the application in the industry. Build up the temperature measurement system with the AFM ? 優貝克

Acknowledgement We appreciate the funding support from the government, industry, and university. The useful discussion and in-put from the academic colleagues is also very appreciated. 優貝克