B-11 Subcommittee/Task Group 3D Package Technology Meeting IPC-7091: Design and Assembly Process Implementation of 3D components Group Chair: Dudi Amir, Intel Corporation Vice-Chair: Vern Solberg, Solberg Technical Consulting Wednesday, March 16 2016 Las Vegas Convention Center Las Vegas, NV.

Agenda: Agenda Welcome Project History Document Scope and Intent Review Minutes and Action Items from last meeting Review the current working draft and help needed Determine next steps for committee Review New Action Items

Antitrust Statement There should never be a discussion of the following at IPC meetings: Price or any elements of price or pricing policies, including costs, discounts, etc. Sales or production quotas, territories, allocations, boycotts or market shares. Identified individual company statistics, inventories or merchandising methods. Particular competitors or customers. Commercial liabilities, warranties, guarantees or the particular terms and conditions of sales, including credit, shipping and transportation arrangements. Anything dealing with "arm-twisting," trade abuses or excluding or controlling competition.

Principles of Standardization In May 1995 the IPC’s Technical Activities Executive Committee (TAEC) adopted Principles of Standardization as a guiding principle of IPC’s standardization efforts. Standards Should: Show relationship to Design for Manufacturability(DFM) and Design for the Environment (DFE) Minimize time to market Contain simple (simplified) language Just include spec information Focus on end product performance Include a feedback system on use and problems for future improvement Standards Should Not: Inhibit innovation Increase time-to-market Keep people out Increase cycle time Tell you how to make something Contain anything that cannot be defended with data

Project History Feb 2015 Planning meeting, IPC Apex/Expo, San Diego, CA Apr 1st and 2nd 2015 Interim working meeting, Promex facility, Santa Clara, CA July 22, 2015 Interim working meeting, Intel Facility, Hillsboro, OR Sep 30, 2015 IPC Fall Meeting, Stevens Conv. Ctr., Rosemont, IL Dec 2nd 2015 Interim working meeting (Teleconference) Jan 27 2016 Current Mar 16, 2016 IPC Apex/Expo 2016, Las Vegas Conv. Ctr., Las Vegas, NV

IPC 7091 Document Scope This document describes the design and assembly challenges for implementing 3D component technology. Recognizing the effects of combining multiple uncased semiconductor die elements in a single package format can impact individual component characteristics and can dictate suitable assembly methodology. The information contained herein focuses on achieving optimum functionality, process assessment, end- product reliability and repair issues associated with 3D semiconductor package assembly and processing.

IPC-7091 Document Intent To provide useful and practical information to those who are designing, developing or using 3D-packaged semiconductor components or those who are considering 3D package implementation. The 3D semiconductor package may include multiple die elements, some homogeneous and some heterogeneous. The package may also include several discrete passive SMT devices, some of which are surface mounted and some which are integrated (embedded) within the component’s substrate structure.

Implementation Challenges The 3D technology is complex and requires process expertise that may require foundries, outsourced semiconductor assembly and test (OSAT) providers and original design manufacturers (ODM). There is no clear direction where 3D packages will be built, tested and assembled. Industry trend

3D packages examples 3D Package-on-Package with Copper wire 3D Die Stack 3D Package-on-Package 3D w/ HDI Interposer 3D System-in-Package 3D Imbedded Component Substrate 3D Package-on-Package with Copper wire

Substrate Interposer Materials The document will furnish an overview for four substrate interposer variations: Organic Ceramic Silicon Glass Information will include substrate interposer via hole forming and plating processes as well as methodologies for conductor metallization.

Assembly Processes Variations The document will address a number of 3D assembly processes: 3D IC stacking Package on Package Multi level PCB assembly 3D jet printing Information will include process recommendations design consideration, defects and failure analysis. ExtremeTech

Help Needed Thermal Management of 3D components (sec 4.10) Printed Board and other mounting base or board stack up considerations (sec 8) 3D design methodology and challenges (sec 9) Jet printing for 3D (sec 10.2.1) Die attachment in 3D packages (sec 10.4) 3D Component Inspection Techniques (sec 10.6) 3D packages rework (sec 10.7) 3D packages underfill (sec 10.8) 3D assembly testing (sec 11) 3D assembly reliability (sec12)

Next Steps 1. 2. 3. 4, 5. 6. 7

Review New Action Items 1. 2. 3. 4, 5. 6. 7. Next meeting date and location-