Institute for Plasma Research, Gandhinagar, Gujarat, INDIA

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Presentation transcript:

Institute for Plasma Research, Gandhinagar, Gujarat, INDIA Overview of Data Acquisition and Central Control System of Steady state Superconducting Tokamak (SST-1) S. Pradhan*, K. Mahajan, H. K. Gulati, M. Sharma, A. Kumar, K. Patel, H. Masand, I. Mansuri, J. Dhongde, M. Bhandarkar and H. Chudasama Institute for Plasma Research, Gandhinagar, Gujarat, INDIA *pradhan@ipr.res.in 10th IAEA Technical Meeting on Control, Data Acquisition and Remote Participation for Fusion Research 20-24 April 2015 at IPR India

Steady State Superconducting Tokamak (SST-1) 10th IAEA Technical Meeting 2015

10th IAEA Technical Meeting 2015 Introduction SST-1 Data Acquisition (DAQ) and Central Control System (CCS) Features: Lossless, Continuous Acquisition 10KSPS to 1MSPS Sampling Frequency Distributed & Hierarchal Event Driven Controls & Monitors Remotely Supports Heterogeneous Sub-systems CCS consists of Network Infrastructure Control Room Infrastructure Machine and Experiment Control Plasma Control and Timing System, GPS based Time Synchronization Storage Area Network Audio/Video Systems DAQ consists of Slow Data Acquisition Systems Fast Data Acquisition CAMAC based Systems PXI based Systems MATLAB based Data Analysis Utilities 023/P, 0268) 025/P, 026/P, 027/P,030/P, 049/P, 050/P, 062/P,069/P) 10th IAEA Technical Meeting 2015

Central Control System (CCS) Configuration 100Mbps Conventional Time Synchronization Real-time Deterministic Data transfer Clock Synchronization 10th IAEA Technical Meeting 2015

Interfacing of SST-1 various Sub-Systems with MCS 10th IAEA Technical Meeting 2015

Plasma Control System Configuration VME SBC RFM DSP ADC Timing Sys VME Bus PCI Bus FPDP Bus Clock Ethernet Realtime Data Network Timing System Network APC I/F To APC Power supply ADC : Pentek 6802, 96 (32*3) channels, 24bit, sampling 10KSPS DSP : TSC-43, Quad Tiger-shark TS101 DSP on a PMC board having FPDP interface RFM : VMIC 5579, Memory of 64MB, sustained link speed of 13.4 Mbytes/s Timing system VME Processor: SBS VG4, Processor PPC 750, 400Mhz with VxWorks 5.5 as RTOS

Existing Overall PCS connectivity 10th IAEA Technical Meeting 2015 at IPR India

Horizontal Plasma Position Control Loop Schematic way for Vertical Field(BBV ) generated & resulting force (FBV) Schematic of BV Feedback Loop IBV Feedback loop uses – IP , Delta R as feedback signal and manipulated variable as IBV Discharge starts with Feed Forward Loop Active Feedback starts after discharge by few ms i.e. once Plasma column is completely formed Loop time ~ 2.0ms

10th IAEA Technical Meeting 2015 at IPR India SST-1 Timing System 10th IAEA Technical Meeting 2015 at IPR India

GPS Based Time Synchronization System 10th IAEA Technical Meeting 2015 at IPR India

SAN Based Centralized Storage System 10TB capacity 10th IAEA Technical Meeting 2015 at IPR India

Overview of SST-1 Data Acquisition System Major Tasks Centralized Data Acquisition for SST-1 diagnostics Centralized Data Storage Server for Archival And Retrieval. Data Analysis at different Network nodes (Client/Server). Communication interface with SST-1 Central Control System. ~ 150 slow (100 KSPS) , 20 Fast (MSPS) in PXI/CAMAC platform operating now

SST-1 Data Archival and Retrieval System

Matlab based Data Conversion & Plotting Data Conversion Utility Matlab GUI Based SSTPLOT Data Plotting with various features Plotted Data Fig

Experimental Data Analysis Utility is developed in Matlab & Some results of recently carried out SST-1 Experiments 10th IAEA Technical Meeting 2015 at IPR India

10th IAEA Technical Meeting 2015

10th IAEA Technical Meeting 2015 Comparison between Magnetic Probe, Flux loop & Analytical methods for Horizontal Shift Measurement - Shot No.6065 10th IAEA Technical Meeting 2015

10th IAEA Technical Meeting 2015 Effective edge safety factor and Grad- Shafranov parameter for shot No- 6065 10th IAEA Technical Meeting 2015

Data Acquisition and Control System Upgrade plan 10th IAEA Technical Meeting 2015

Planned 10Gbps Network Architecture for SST-1 Central Control Room Diagnostic Hall Office Corridor RF Bay Computer Center Cryo Hall Water Cooling Utility Building RF Lab NBI APPS Planned 10Gbps Network Architecture for SST-1 12 Core Single Mode Fiber Core Switch 1G Access Switch LIU 50 meter 80 meter 150 meter 300 meter 190 meter 250 meter 24 Core Single Mode Fiber (72 Node) (18 Node) (8 Node) (4 Node) 10G Access Switch Patchcord Stacking   10G User 10th IAEA Technical Meeting 2015

10th IAEA Technical Meeting 2015 at IPR India Evaluation of White Rabbit Technology using evaluation kit from Seven-solution Spain Single solution for real-time Data transfer, Trigger and Time Open source Low Cost Heterogeneous Platform support 10th IAEA Technical Meeting 2015 at IPR India

SST-1 Diagnostics DAQ Hardware Upgradation Plan Slow Channels : Sampling rate < 100-250 KSPS Fast Channels : Sampling rate = 1MSPS or more Sampling Rate Current DAQ Card Upgrade DAQ Module Channels Catered/ Future Plan Current Acquisition time Future Acq. time 1 MSPS CAMAC 2-Ch card PXIe 6366 12 / 21 512 ms 4 sec 10 MSPS N.A. PXI 6115 00 / 08 10 KSPS PXI-6071 No change 36 / 84 3 sec Continuous mode 100 KSPS PXI-6143 No Change 58 / 189

New Proposed Configuration for PCS Hardware Use PC based controllers Keep separate the controllers and IO chassis PC and IO connect with PCIe bus link Replace/upgrade PC whenever required Industrial PC MXI link Multiple IO chassis configurations 10th IAEA Technical Meeting 2015 at IPR India

10th IAEA Technical Meeting 2015 at IPR India Conclusion Central Control System (CCS) is distributed, modular & scalable Integrates all heterogeneous SST-1 subsystems CCS is indigenously designed, developed, implemented, tested and validated for the operational since 2008. CCS is built-on well proven technologies like vxWorks RTOS for deterministic control, VME, PXI, FPGA for hardware implementation, Fiber optics for network backbone, DSP for real-time computation & Reflective memory for high-speed data transfer etc. CCS architecture is being upgraded to fulfill the today’s requirements of SST-1 using cutting edge technologies 10th IAEA Technical Meeting 2015 at IPR India

Please be welcome & find the details during the poster sessions Sr No. Abstract ID Abstract Title Author 1 028/P SST-1 CAMAC based Data Acquisition System for fast plasma diagnostics and future up gradation plan Imran Mansuri 2 023/P Overview of Data Acquisition System for SST-1 Diagnostics Manika Sharma 3 069/P Overview of Time Synchronization System of Steady State Superconducting Tokamak SST-1 Aveg Kumar 4 050/P Archiving and retrieval of experimental data using SAN based centralized storage system for SST-1 Manisha Bhandarkar 5 049/P Design, architecture and operational experience of Machine Control System [MCS] for SST-1 Harish Masand 6 030/P Current status and upgrade plan for Networking System of Steady State Super conducting Tokamak SST-1 Hitesh Gulati 7 027/P SST--1 Central Control Infrastructure: An Overview Jasraj Dhongde 8 025/P Present Status and Future Plan for SST-1 Real Time Network Kirti Mahajan 9 026/P Audio Visual system for SST-1 operations Hitesh Chudasama 10 062/P Design and Architecture of SST-1 basic plasma control system Kirit Patel 11 031/O Overview of data acquisition and central control system of steady state superconducting tokamak (SST-1) Subrata Pradhan 10th IAEA Technical Meeting 2015

SST-1 Existing Network (Schematic) 10th IAEA Technical Meeting 2015 at IPR India