Progress Report 2014/05/23.

Slides:



Advertisements
Similar presentations
4. Workload directed adaptive SMP multicores
Advertisements

Energy Efficiency through Burstiness Athanasios E. Papathanasiou and Michael L. Scott University of Rochester, Computer Science Department Rochester, NY.
Energy-Efficient System Virtualization for Mobile and Embedded Systems Final Review 2014/01/21.
CPU Ready Time in VMware ESX Server Bill Shelden
Techniques for Multicore Thermal Management Field Cady, Bin Fu and Kai Ren.
Silberschatz, Galvin and Gagne  2002 Modified for CSCI 399, Royden, Operating System Concepts Operating Systems Lecture 19 Scheduling IV.
Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.
Shimin Chen Big Data Reading Group.  Energy efficiency of: ◦ Single-machine instance of DBMS ◦ Standard server-grade hardware components ◦ A wide spectrum.
Multiprocessing Memory Management
Introduction to ARM Architecture, Programmer’s Model and Assembler Embedded Systems Programming.
Progress Report Design, implementation, experiments, and demo plan 2014/12/03 1.
1Chapter 05, Fall 2008 CPU Scheduling The CPU scheduler (sometimes called the dispatcher or short-term scheduler): Selects a process from the ready queue.
 Introduction Introduction  Definition of Operating System Definition of Operating System  Abstract View of OperatingSystem Abstract View of OperatingSystem.
Chapter 8 Multi-Level Feedback Queue Chien-Chung Shen CIS, UD
Codeplay CEO © Copyright 2012 Codeplay Software Ltd 45 York Place Edinburgh EH1 3HP United Kingdom Visit us at The unique challenges of.
USTH Presentation Power-aware Scheduler for Virtualization TRAN Giang Son Prof. Daniel HAGIMONT Oct 19th, 2011.
المحاضرة الاولى Operating Systems. The general objectives of this decision explain the concepts and the importance of operating systems and development.
Xen (Virtual Machine Monitor) Operating systems laboratory Esmail asyabi- April 2015.
An Energy-Efficient Hypervisor Scheduler for Asymmetric Multi- core 1 Ching-Chi Lin Institute of Information Science, Academia Sinica Department of Computer.
Real-Time Systems Mark Stanovich. Introduction System with timing constraints (e.g., deadlines) What makes a real-time system different? – Meeting timing.
4.1 Advanced Operating Systems Desktop Scheduling You are running some long simulations. In the mean time, why not watch an illegally downloaded Simpsons.
VGreen: A System for Energy Efficient Manager in Virtualized Environments G. Dhiman, G Marchetti, T Rosing ISLPED 2009.
Operating System Principles And Multitasking
Virtual Memory The memory space of a process is normally divided into blocks that are either pages or segments. Virtual memory management takes.
Progress Report 2014/01/10. Agenda Summary of paper study ◦ A Resource-Driven DVFS Scheme for Smart Handheld Devices, Dec Discuss the new direction.
Progress Report 2013/11/07. Outline Further studies about heterogeneous multiprocessing other than ARM Cache miss issue Discussion on task scheduling.
Research on Asymmetric-aware Hypervisor Scheduler Project overview 6/4.
IIS Progress Report 2015/10/12. Problem Revisit Given a set of virtual machines, each contains some virtual cores with resource requirements. Decides.
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction University of California MICRO ’03 Presented by Jinho Seol.
Assoc. Prof. Dr. Ahmet Turan ÖZCERİT.  What Operating Systems Do  Computer-System Organization  Computer-System Architecture  Operating-System Structure.
Outline Models Design of experiments Current Scheduler Completely Fair Scheduler(CFS) ◦ Since Linux ◦ /kernel/sched.c ◦ Maintain balance (fairness)
Virtualization One computer can do the job of multiple computers, by sharing the resources of a single computer across multiple environments. Turning hardware.
Research on Embedded Hypervisor Scheduler Techniques 2014/10/02 1.
An Integrated GPU Power and Performance Model (ISCA’10, June 19–23, 2010, Saint-Malo, France. International Symposium on Computer Architecture)
Progress Report 2013/08/22. Model Modification Each core works under the same frequency due to hardware limitation. A task can have different processing.
Shouqing Hao Institute of Computing Technology, Chinese Academy of Sciences Processes Scheduling on Heterogeneous Multi-core Architecture.
Ensieea Rizwani An energy-efficient management mechanism for large-scale server clusters By: Zhenghua Xue, Dong, Ma, Fan, Mei 1.
Progress Report 07/30. Virtual Core Scheduling Problem For every time period, the hypervisor scheduler is given a set of virtual cores with their operating.
Software System Performance CS 560. Performance of computer systems In most computer systems:  The cost of people (development) is much greater than.
Bolt : Faster Reconfiguration in Operating Systems Sankaralingam Panneerselvam Michael M. Swift Nam Sung Kim University of Wisconsin, Madison, WI ATC 2015.
IIS Progress Report 2016/01/11. Goal Propose an energy-efficient scheduler that minimize the power consumption while providing sufficient computing resources.
Event-Based Scheduling for Energy-Efficient QoS (eQoS) in Mobile Web Applications Yuhao Zhu, Matthew Halpern, Vijay Janapa Reddi Department of Electrical.
Are Low Power Server CPUs Worth the Cost?
Ching-Chi Lin Institute of Information Science, Academia Sinica
Computing Resource Allocation and Scheduling in A Data Center
International Symposium on Microarchitecture. New York, NY.
Some challenges in heterogeneous multi-core systems
Department of Computer Science University of California, Santa Barbara
Chapter 1: Intro (excerpt)
Computer Architecture
Dynamic Voltage Scaling
Chapter 10 Operating Systems.
Progress Report 2014/04/23.
ESE 150 – Digital Audio Basics
Research on Embedded Hypervisor Scheduler Techniques
Scheduling.
Uniprocessor scheduling
Progress Report 08/31 Simon.
Progress Report 2012/12/20.
Progress Report 2015/01/28.
Progress Report 2017/02/08.
IIS Progress Report 2016/01/18.
Progress Report 11/05.
Scheduling of Regular Tasks in Linux
Online Pogo Game Customer Service
Pogo Game Customer Care Helpline Number

Call Pogo Contact Phone Number and Enjoy Pogo Game
CPU Scheduling David Ferry CSCI 3500 – Operating Systems
Presentation transcript:

Progress Report 2014/05/23

Different Applications Run different applications on ODROID board and observe the loading and power reading. Type 1 big.LITTLE core board Applications including Video Game Mobile benchmarks

Video - .rmvb

Video - .mkv

Observations The CPU loadings vary from one media player to the other on playing the same video. A media player results in different CPU loading while playing videos with different format.

Game - Angry Bird

Observation There are many “peaks of loading”. Probably caused by user behaviors.

Benchmark - Antutu

Benchmark - Quadrant

Benchmark - Vellamo

Short Summary It is difficult to predict or estimate the behavior of each task in the system during runtime.

Scheduler in Hypervisor Instead of focusing on scheduling tasks to (virtual) cores in one OS, we can consider scheduling virtual cores to physical cores from the hypervisor perspective.

Problem Given a set of VMs, each VM has several virtual cores with different frequencies. How to schedule these virtual cores to a set of big and little physical cores, such that each virtual core is can have sufficient computing cycles in a fixed time interval.

Core Model Need to build the Loading-to-Power model of big and little core. Decide which is better, “separate” or “consolidate” Run bzip2 and busyAdding using one big or little core, and measure the power consumption. Use cpulimit to cap the loading of task.

Result – bzip2

Result - busyAdding

Short Summary The power consumption is almost linear to the loading. Even the loading is the same, the power consumption is slightly higher while executing bzip2 than busyAdding. Probably the power consumed by cache or other components on core.

Current Idea “Big vCPUs to big ARM cores, little vCPUs to little ARM cores”. If big ARM cores can not provide enough CPU resource, then consider schedule big vCPUs on both big and little ARM cores. Note that we can “slice” a core.