SVT subchapters & editors Vertex Detector Overview (12) – G. Rizzo Backgrounds (4) – R. Cenci Detector Performance Studies (6) – N. Neri Silicon Sensors (8) – L. Bosisio Fanout Circuits (8) – L. Vitale Electronics Readout (28) Readout Chips (10) – V. Re Hybrid Design (10) – M. Citterio Data Transmission (8)– M. Citterio Power Supplies (1??) -??? SVT DAQ (M. Villa) will be in the ETD section Mechanical Support & Assembly (14) – S. Bettarini/F. Bosi Layer0 pixel upgrade options (10) – G. Rizzo/L. Ratti/ + others Services, Utilities (2) -?? Editors produced a first draft of detailed outline (next slides); first estimate of pages ~ 92 is too high. We should try to end up with ~60 pages. Reduce by 30% !! G. Rizzo SVT-TDR Meeting - Oct 21st 2011

Next steps: Instructions on TDR writing in: http://mailman.fe.infn.it/superbwiki/index.php/Detector_Technical_Design_Report I will include in the SVN repository the SVT outline next week. A first draft of the document is due for the Dec. Collaboration Meeting. (13 Dec.) I would like to discuss with you the status of the document during the SVT meeting on Dec. 2nd. Editors should insert a first draft of their chapters in the SVN repository by Nov, 30! G. Rizzo

Tech. Board Meeting – Setp/13t 2011 Next Meetings Dates Nov 4 Update on Mechanics Update on Peripheral Electronics Update on Striplets performance Nov 18 Update on FE chip simulation Update on fanout and sensor Dec 2 Discuss first draft of TDR Dec 13 Collaboration Meeting Frascati G. Rizzo Tech. Board Meeting – Setp/13t 2011

1 Vertex Detector Overview (12) – G. Rizzo Requirements (1) SVT and Layer0 (1) Baseline Detector Concept (4) Technology Layout Electronics Mechanical Support Layer0 Pixel Upgrade (4) Technology Options Pixel module design Mechanical support & cooling R&D Main Activities (2) G. Rizzo

SVT-TDR Meeting - Oct 21st 2011 2 Background (4) – R. Cenci 2.1 Main background sources for SVT Pair production Radiative Bhabhas Touschek Other sources 2.2 Cluster multiplicity 2.3 Energy deposited Include summary tables with rates, doses, equivalent fluences for various layers G. Rizzo SVT-TDR Meeting - Oct 21st 2011

3. Detector Performance Studies (6) – N. Neri Introduction (1/2 page) From BaBar experience to SuperB (some considerations about the main differences (luminosity, boost, beampipe, beamspot) and the idea behind the new detector design, focusing on performances). Impact of L0 on detector performances (2 pages) Definition of L0 requirements for physics (material budget, inner radius vs boost, outer radius, intrinsic resolution, coverage) Vertex and proper time resolutions (vs different configurations) Baseline solution (performances, pro and cons) Sensitivity studies for time-dependent analyses (2 pages) studies of benchmark channels: phiKs, pipi, etc. impact of high bkg (QED pairs bkg) Tracking performances (1 page) Track parameter resolutions Pattern recognition (Efficiency vs number of layers, reconstruction capabilities for low momentum tracks , to be understood what to present) Particle identification (1/2 page) dE/dx resolution (relevance for QED pairs suppression, to be studied) G. Rizzo

4. Silicon Sensors (8) – L. Bosisio 4.1 Requirements 4.1.1 Efficiency 4.1.2 Resolution 4.1.3 Radiation hardness 4.2 Sensor design 4.2.1 Technology choice 4.2.2 Optimization of strip layout 4.2.3 Wafer sizes and quantities 4.3 Prototyping and tests G. Rizzo

5. Fanouts (8) –L. Vitale + MI 5.1. Fanouts for layer0 5.1.1 Requirements 5.1.2 Technology 5.1.3 Design 5.1.4 Prototyping and tests 5.2 Fanouts for outer layers 5.2.1 Requirements 5.2.2 Technology 5.2.3 Design 5.2.4 Prototyping and tests G. Rizzo

6.1 Readout Chips for Strips (10) – V. Re Introduction and functional overview (page 1) Requirements of readout chips (pages 2-3) 2.1. Layers 0-3 2.2. Layers 4-5 Implementation and block diagrams of readout chips (pages 4-7) 3.1. Analog Section 3.2. Digital Section R&D for readout chips (pages 8-10) 4.1. Analog Section 4.2. Digital Section 4.3. Auxiliary blocks, chip integration and schedule G. Rizzo

6.2 Hybrid Design (10) – M. Citterio 6.2.1 Requirements 6.2.2 Technology selection 6.2.3 Hybrid specifications 6.2.3.1 Layer 0 6.2.3.2 Outer layers 6.2.4 Design and layout 6.2.5 Prototyping and tests G. Rizzo

6.3 Data Trasmission (8) – M. Citterio 6.3.1. Requirements 7.4.1.1 Layer 0 7.4.1.2 Outer layers 6.3.2 Data encoding and error correction 6.3.3 Technology selection 7.4.3.1 Specifications for Layer 0 7.2.3.2 Specification for outer layers 6.3.4 Design 6.3.5 Prototyping and tests G. Rizzo

7. SVT Mechanical support and Assembly (14) S. Bettarini – F. Bosi 7.1 I.R. Constraint (1) Description of the IR components: Be-pipe, L0, SVT, W shielding, QD0 Active region definition and clearances Mechanical architecture (how each components is constrained to what) Staging area assembly Quick demounting motivations and removable support cage concept 7.2 Module Assembly (2) L0 module baseline components and assembly procedure L 1-->5 module components and assembly procedure 7.3 Detector assembly and installation (6) 7.3.1 Half detector assembly (1) L0 module assembly on the cold flanges Cold flanges descriptions, required features and jig L 1-->5 module assembly on the Support cones Support cones, buttons, cooling ring description, required features and jig Space frame features G. Rizzo

7. SVT Mechanical support and Assembly (II) 7.3.2 Mount L0 to Be-pipe and L 1-5 to W shielding and displacement to IR (2) HDMF assembly description for L0 on the be-pipe HDMF assembly for L 1-->5 on the W shielding Gimbal ring and support cage description Optical modules survey Electrical testing and connection to the transition Card 7.3.3 Installation of complete assembly into detector (1) Constrains and scenario of mounting, stiffness and clearance required 7.3.4 Quick demounting (2) Infrastructure required and SVT demounting/mounting procedure 7.4 Detector placement and survey (1) 7.4.1 Placement accuracy 7.4.2 Survey with tracks 7.5 Detector monitoring (in MDI section?) (2) 5.1 Position monitoring system 5.2 Radiation monitoring 7.6 R&D Program (1) 6.1 Cable 6.1 hybrid .6.1 Inner layer sextant 1.6.1 Arch modules 1.6.1 Cones and space frame 1.6.6 Full scale model of IR G. Rizzo

8 Layer0 pixel upgrade (10) – G. Rizzo – L. Ratti Requirements Technology options Hybrid pixels Monolithic sensors in INMAPS technology 3D monolithic sensors Analog front-end Digital readout architecture Prototype characterization Radiation hardness R&D activity G. Rizzo

9 Services, utilities and E.S.& H issues (2) 9.1 Service and Utilities 2.1.2 Data and control lines 2.2.2 Power 2.3 Cooling water 2.4 Dry air or nitrogen 9.2 ES&H Issue G. Rizzo