ARM.

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Presentation transcript:

ARM

ARM history Acorn RISC Machine (Acorn Computers, UK) Design initiated 1983, first silicon 1985 Licensing model allows for custom designs (contrast to x86) Does not produce their own chips Companies customize base CPU for their products PA Semiconductor (fabless, SoC startup acquired by Apple for its A4 design that powers iPhone/iPad) ARM estimated to make $0.11 on each chip (royalties + license) Runs 98% of all mobile phones (2005) Per-watt performance better than x86 Less “legacy” instructions to implement

ARM architecture RISC architecture 32-bit reduced instruction set machine inspired by Berkeley RISC (Patterson, 1980-1984) Fewer instructions Complex instructions handled via multiple simpler ones Results in a smaller execution unit Only loads/stores to and from memory Uniform-size instructions Less decoding logic 16-bit in Thumb mode to increase code density

ARM architecture ALU features Conditional execution built into many instructions Less branches Less power lost to stalled pipelines No need for branch prediction logic Operand bit-shifts supported in certain instructions Built-in barrel shifter in ALU Bit shifting plus ALU operation in one (similar to x86 lea) Support for 3 operand instructions <R> = <Op1> OP <Op2>

ARM architecture Control state features Shadow registers (pre v7) Allows efficient interrupt processing (no need to save registers onto stack) Akin to Intel hyperthreading Link register Stores return address for leaf functions (no stack operation needed)

ARM architecture Advanced features SIMD (NEON) to compete with x86 at high end mp3, AES, SHA support Hardware virtualization Hypervisor mode Jazelle DBX (Direct Bytecode eXecution) Native execution of Java Security No-execute page protection

x86 vs ARM Key architectural differences CISC vs. RISC Legacy instructions impact per-watt performance Atom (stripped-down 80386 core) Once a candidate for the iPad State pushed onto stack vs. swapped from shadow registers Bit shifting separate, explicit instructions vs. built-in shifts Memory locations usable as ALU operands vs. load/store only Mostly 2 operand instructions ( <D> = <D> OP <S> ) vs. 3- operand

ARM vs. x86 Other differences Intel is the only producer of x86 chips and designs No SoC customization (everyone gets same hardware) Must wait for Intel to give you what you want ARM allows Apple to differentiate itself Intel and ARM XScale: Intel's version of ARM sold to Marvell in 2006 Speculation Intel advantage on process to make RISC/CISC moot Leakage current will eventually dominate power consumption (versus switching current) Make process advantage bigger than custom design + RISC advantage (avoid wasting money on license)