준비물 Linux (including CrossGCC for ARM) SMDK2400 and Trace32 USB ICD 공부할 내용 ARM Architecture ARM Instruction with Examples ARM Boot code with Monitor program 보충 자료 nnARM core with FPGA board

ARM Architecture

간단한 C 프로그래밍 ARM1 Architecture Steve Furber Roger Wilson Robert Heaton sfurber@cs.man.ac.uk Father of ARM

The History of ARM

ARM7TDMI Pipeline ARM7 ARM9 Fetch Decode Execute Fetch Decode Execute Data/Buffer Write Back

ARM Instruction with Examples

간단한 Assembly 프로그래밍 Dan Dobberpuhl Father of Alpha, StrongARM

How To Cross Compile

ftp://ftp.netwinder.org/users/c/chagas/arm-linux-cross/RPMS/ CrossGCC for ARM RPM Binaries ftp://ftp.netwinder.org/users/c/chagas/arm-linux-cross/RPMS/ arm-linux-binutils-2.10-1.i386.rpm arm-linux-glibc-2.1.3-2.i386.rpm arm-linux-gcc-2.95.2-2.i386.rpm RPM Install #rpm -i arm-linux-binutils-2.10-1.i386.rpm #rpm -i arm-linux-glibc-2.1.3-2.i386.rpm #rpm -i arm-linux-gcc-2.95.2-2.i386.rpm

CrossGCC for ARM ARM GCC environment % which arm-linux-gcc /usr/local/arm/bin/arm-linux-gcc % ls -l total 28 drwxr-xr-x 6 root root 4096 May 30 12:12 arm-linux/ drwxr-xr-x 2 root root 4096 May 30 12:17 bin/ drwxr-xr-x 3 root root 4096 May 30 11:37 glibc/ drwxr-xr-x 3 root root 4096 May 30 11:31 include/ drwxr-xr-x 2 root root 4096 May 30 12:17 info/ drwxr-xr-x 3 root root 4096 May 30 12:17 lib/ drwxr-xr-x 3 root root 4096 May 30 11:22 man/ %

CrossGCC for ARM /* * File : scopy.s * Author : Benjamin Jung * Date : May 8, 2000 * */ .data @ section declaration .text @ section declaration @ we must export the entry point to the ELF linker or .global _start @ loader. They conventionally recognize _start as their @ entry point. Use ld -e foo to override the default. _start: ldrb r2, [r1],#1 @ load byte and update address strb r2, [r0],#1 @ store byte and update address; cmp r2, #0 @ check for zero terminator bne _start @ keep going if not mov pc,lr @ Return

How to Compile Compiling with the ARM Assembler % arm-linux-as -o scopy.o scopy.S ELF file by the ARM Linker % arm-linux-ld -o scopy scopy.o Binary file by the ARM Binary Utilities % arm-linux-objcopy input-format=elf32-arm output-format=binary scopy scopy.bin

Branch Instruction

Data Processing Instruction

ARM Shift Operations

ARM Boot code with Monitor program

간단한 Inline 프로그래밍 John Hennessy hennessy@stanford.edu Father of MIPS

GDB로 디버깅하기 David Patterson patterson@cs.berkeley.edu Father of SPARC

monitor.lds /* * (C) Copyright 2002 * Benjamin Jung * * http://www.geocities.com/bsjung74 */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { . = 0x04100000; . = ALIGN(4); .text : boot.o (.text) *(.text) } .rodata : { *(.rodata) } . = 0x043f0000; .data : { *(.data) } .got : { *(.got) } .bss : { *(.bss) } monitor.lds

/* * * File : boot.S * Author : Benjamin Jung (bsjung@samsung.com) * Date : May 8, 2000 */ .text /* extern function to blink the LED */ .extern blink_led /* Jump vector table as in table 3.1 in [1] */ .globl _start _start: b reset b undefined_instruction b software_interrupt b abort_prefetch b abort_data b not_used b irq b fiq reset: /* Switch the SA-1110 to 206 MHz */ /* First, mask **ALL** interrupts */ /*way that the LED is on an output port */ /* load the GPIO base in r2 */ never_ending: /* Bit 10,11 is the LED, according to JDB */ /* infinite loop for led brinking */ nop b never_ending undefined_instruction: b undefined_instruction software_interrupt: b software_interrupt abort_prefetch: b abort_prefetch abort_data: b abort_data not_used: b not_used irq: b irq fiq: b fiq

How to Compile Compiling with the ARM Assembler % arm-linux-as -x assembler-with-cpp -o boot.o boot.S ELF file by the ARM Linker % arm-linux-ld -T monitor.lds -o boot.elf boot.o Binary file by the ARM Binary Utilities % arm-linux-objcopy input-format=elf32-arm output-format=binary boot.elf boot.bin

Appendix : nnARM core with FPGA board

Father of OpenCores.org nnARM By ShengYu Shen 2001.6 Verilog HDL ARMv4 FPGA Board Xilinx Vertex100 PCB Design with Protel EDA Damjan Lampert lampert@opencores.org Father of OpenCores.org

nnARM 4 stage Pipeline IF : IF.v ID : Decode_ARM.v ALU : ALUShell.v MEM : mem.v