ECAL Front-end development

Slides:



Advertisements
Similar presentations
Measuring Cosmic Ray Flux with a trigger and CAMAC readout - Page 1 Connect the Fluke 415 HV supply output to the input of the voltage distribution box.
Advertisements

SKIROC New generation readout chip for ECAL M. Bouchel, J. Fleury, C. de La Taille, G. Martin-Chassard, L. Raux, IN2P3/LAL Orsay J. Lecoq, G. Bohner S.
July 10, 2008 PHENIX RPC review C.Y. Chi 1 RPC Front End Electronics On chamber discriminator  The strips  The CMS discriminator chips  The discriminator.
BTeV RICH HV System. The RICH HV System Power One 24V – 1.2A TNG Matsusada HVPS HPD.
6 June 2002UK/HCAL common issues1 Paul Dauncey Imperial College Outline: UK commitments Trigger issues DAQ issues Readout electronics issues Many more.
RPC Electronics Overall system diagram –At detector –Inside racks Current status –Discriminator board –TDC board –Remaining task.
WALTA DAQ. Input 4 BNC Connections for PM signal GPS Connection for Time Signal Serial port for programming.
SVT TDR meeting – March 30, 2012 List of peripheral blocks for SVT strip readout chips.
PH4705/ET4305: A/D: Analogue to Digital Conversion Typical Devices: Data sheets are on the web site for A/D 8 bit parallel AD7819 and serial ADC0831 And.
LSU 06/04/2007Expanding the BASIC Stamp1 Expanding the BASIC Stamp: Useful peripherals Programming Unit, Lecture 6.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
Laguna Beach, CA March 30-April 1, 2003 PMT HV Base Board Development Nobuyoshi Kitamura SSEC / UW-Madison.
ECAL FEE and DAQ Yury Gilitsky IHEP. PHENIX EMCAL PERFORMANCE.
General Purposes Input/ Output Daughter board for Univ Eval Rev B Julien Cercillieux University of Hawaii
Figure 1: ICD Single Channel Block Diagram Schematic PMT High Voltage Supply (see Figure 4 & 4a) LED Pulser PMT Calibration (see Figure 6) ICD Scintillator.
HBD FEM the block diagram preamp – FEM cable Status Stuffs need to be decided….
HV-Splitter for RENO Project S. Stepanyan, 김우영 경북대학교 Y.Kim Sejong University May-2008.
HBD FEE test result summary + production schedule 16mv test pulse result –5X attenuator + 20:1 resistor divider at input (to reduce the noise on the test.
By: Uriel Barron Matan Schlanger Supervisor: Mony Orbach Final Review March 2015.
1 G.Pessina, RICH Elec Upg, 11 April 2010 Analog Channels per chip4 to 8 Digital channel per chip4 to 8 Wire-bond pitch (input channels) Input capacitance.
NUMI Off Axis NUMI Off Axis Workshop Workshop Argonne Meeting Electronics for RPCs Gary Drake, Charlie Nelson Apr. 25, 2003 p. 1.
March 9, 2005 HBD CDR Review 1 HBD Electronics Preamp/cable driver on the detector. –Specification –Schematics –Test result Rest of the electronics chain.
Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani.
ASIC Activities for the PANDA GSI Peter Wieczorek.
DOM Main PCB Testing Gerald Przybylski October 23, 2002 Lawrence Berkeley National Laboratory.
Connector Differential Receiver 8 Channels 65 MHz 12 bits ADC FPGA Receive/buffer ADC data Format triggered Events Generate L1 Primitives Receive timing.
Assumptions: Cockcroft-Walton photomultiplier bases are the same for all ECAL sections Digital to analog converters are installed on the distribution boards.
Status of the PSD upgrade - Status of the PSD cooling and temperature stabilization system - MAPD gain monitoring system - PSD readout upgrade F.Guber,
New digital readout of HFRAMDON neutron counters Proposal Version 2.
0808/0809 ADC. Block Diagram ADC ADC0808/ADC Bit μP Compatible A/D Converters with 8-Channel Multiplexer The 8-bit A/D converter uses successive.
The Slow Control System of the HADES RPC Wall Alejandro Gil on behalf of the HADES RPC group IFIC (Centro Mixto UV-CSIC) Valencia, 46071, Spain IEEE-RT2009.
Backplanes for Analog Modular Cameras EVO meeting. March 14 th,
TIMING DETECTOR ELECTRONICS FRONT END ELECTRONICS - NINO JOSE DA SILVA –CT-PPS TIMING ENGINEERING REVIEW /
29/05/09A. Salamon – TDAQ WG - CERN1 LKr calorimeter L0 trigger V. Bonaiuto, L. Cesaroni, A. Fucci, A. Salamon, G. Salina, F. Sargeni.
Front End. Charge pre-amp and detector Voltage regulator. TOP side. Detector linear voltage regulator BOTTOM side. Charge pre-amp.
MADEIRA Valencia report V. Stankova, C. Lacasta, V. Linhart Ljubljana meeting February 2009.
LHCb Outer Tracker Electronics 40MHz Upgrade
Setup for automated measurements (parametrization) of ASD2 chip
Integrating part of the ATLAS Radiation Monitor will measure
ABB i-bus® EIB / KNX Analogue Input AE/S 4.2
Kenneth Johns University of Arizona
Calorimeter Mu2e Development electronics Front-end Review
on behalf of the AGH and UJ PANDA groups
Integrated Circuits for the INO
Digital-to-Analog Analog-to-Digital
Functional diagram of the ASD
SCSI.
Iwaki System Readout Board User’s Guide
96-channel, 10-bit, 20 MSPS ADC board with Gb Ethernet optical output
EMC Electronics and Trigger Review and Trigger Plan
Front-end electronic system for large area photomultipliers readout
VELO readout On detector electronics Off detector electronics to DAQ
LHCb calorimeter main features
PRODUCTION BOARDS TESTING
Universal Interface, 12-fold, FM US/U 12.2
PERSPECTIVE ON MICROWAVE MONITOR AND CONTROL INTERFACES
RPC Front End Electronics
NA61 - Single Computer DAQ !
PRODUCTION BOARDS TESTING
Functional diagram of the ASD
SKIROC status CERN – CALICE/EUDET electronic & DAQ meeting – 22/03/2007 Presented by Julien Fleury.
RPC Front End Electronics
HallD Collaboration Meeting Jefferson Lab December 11-13, 2003
RPC FEE The discriminator boards TDC boards Cost schedule.
RPC Electronics Overall system diagram Current status At detector
Presented by T. Suomijärvi
Digitally subtracted pulse between
The QUIET ADC Implementation
Characterization of Wired-OR prototype board
Verify chip performance
Presentation transcript:

ECAL Front-end development

Front-end Board Specification: Output shaping: Nr of channels : 8 Input voltage range: 0 - 10V Input resistance: 50 Ohm Supply voltage: +- 5V Output shaping: Rising time: 100 ns Length of pulse: 400 ns Output range: 2V pp output DC voltage: 0.9V

Front-end Board Connections: Threshold Digital output: LVDS Digital output connector: 20-way 100 mils twisted pair cable Analog output connector: KEL 80 way twisted pair 50 mils Input connector: MMCX Threshold 10-bit DAC in each channel SPI compatible 3-wire serial interface

Front-end Readout Board TRBv3 addon board (new development - 65Ms ADC-see Michael talk) old Shower-Addon ADC

Schedule Front-end board: December 2011 TRBv3 addon: March 2012