Introduction: From Nand to Tetris

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Presentation transcript:

Introduction: From Nand to Tetris Building a Modern Computer From First Principles www.nand2tetris.org 1

The course at a glance Objectives: Understand how hardware and software systems are built, and how they work together Learn how to break complex problems into simpler ones Learn how large scale development projects are planned and executed Have fun Methodology: Build a complete, general-purpose, and working computer system Play and experiment with this computer, at any level of interest.

Some nand2tetris details 12 projects (We’ll probably do 5 or 6) Hardware projects are done and simulated in HDL (Hardware Description Language) Software projects can be done in any language of your choice (we recommend Java) Projects methodology: Design (API) + test materials are given Implementation done by students Tools: simulators, tutorials, test scripts Book

Demo Pong, 1985 Pong, 2011 Pong, on our computer

Course theme and structure Human Thought Abstract design Chapters 9, 12 Software hierarchy Assembly Language abstract interface H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 Virtual Machine abstract interface VM Translator Chapters 7 - 8 Assembler Chapter 6 Hardware hierarchy Machine Language abstract interface Computer Architecture Chapters 4 - 5 Hardware Platform abstract interface Gate Logic Chapters 1 - 3 Chips & Logic Gates abstract interface Electrical Engineering Physics (Abstraction–implementation paradigm)

Application level: Pong (example app)

The big picture Software hierarchy Hardware Abstract design Human Assembler Chapter 6 H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 VM Translator Chapters 7 - 8 Computer Architecture Chapters 4 - 5 Gate Logic Chapters 1 - 3 Electrical Engineering Physics Virtual Machine Software hierarchy Assembly Language Hardware Platform Chips & Logic Gates Human Thought Abstract design Chapters 9, 12

High-level programming (our very own Jack language) /** A Graphic Bat for a Pong Game */ class Bat { field int x, y; // screen location of the bat's top-left corner field int width, height; // bat's width & height // The class constructor and most of the class methods are omitted /** Draws (color=true) or erases (color=false) the bat */ method void draw(boolean color) { do Screen.setColor(color); do Screen.drawRectangle(x,y,x+width,y+height); return; } /** Moves the bat one step (4 pixels) to the right. */ method void moveR() { do draw(false); // erase the bat at the current location let x = x + 4; // change the bat's X-location // but don't go beyond the screen's right border if ((x + width) > 511) { let x = 511 - width; do draw(true); // re-draw the bat in the new location Typical call to an OS method

Operating system level (our very own Jack OS) /** An OS-level screen driver that abstracts the computer's physical screen */ class Screen { static boolean currentColor; // the current color // The Screen class is a collection of methods, each implementing one // abstract screen-oriented operation. Most of this code is omitted. /** Draws a rectangle in the current color. */ // the rectangle's top left corner is anchored at screen location (x0,y0) // and its width and length are x1 and y1, respectively. function void drawRectangle(int x0, int y0, int x1, int y1) { var int x, y; let x = x0; while (x < x1) { let y = y0; while(y < y1) { do Screen.drawPixel(x,y); let y = y+1; } let x = x+1;

The big picture Software hierarchy Hardware Abstract design Human Assembler Chapter 6 H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 VM Translator Chapters 7 - 8 Computer Architecture Chapters 4 - 5 Gate Logic Chapters 1 - 3 Electrical Engineering Physics Virtual Machine Software hierarchy Assembly Language Hardware Platform Chips & Logic Gates Human Thought Abstract design Chapters 9, 12

A modern compilation model

Compilation 101 Abstraction Syntax Analysis Parse Tree push x push width add push 511 gt Intermediate code Source code (x + width) > 511 parsing Code generation Abstraction Syntax Analysis Parse Tree Semantic Synthesis Implementation Observations: Modularity Abstraction / implementation interplay The implementation uses abstract services from the level below.

The Virtual Machine (our very own VM, modeled after Java’s JVM) if ((x+width)>511) { let x=511-width; }

The big picture Software hierarchy Hardware Abstract design Human Assembler Chapter 6 H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 VM Translator Chapters 7 - 8 Computer Architecture Chapters 4 - 5 Gate Logic Chapters 1 - 3 Electrical Engineering Physics Virtual Machine Software hierarchy Assembly Language Hardware Platform Chips & Logic Gates Human Thought Abstract design Chapters 9, 12

Low-level programming (on the Hack computer) For now, ignore all details!

Low-level programming (on the Hack computer) For now, ignore all details!

Low-level programming (on the Hack computer) For now, ignore all details!

The big picture Software hierarchy Hardware Abstract design Human Assembler Chapter 6 H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 VM Translator Chapters 7 - 8 Computer Architecture Chapters 4 - 5 Gate Logic Chapters 1 - 3 Electrical Engineering Physics Virtual Machine Software hierarchy Assembly Language Hardware Platform Chips & Logic Gates Human Thought Abstract design Chapters 9, 12

Machine language semantics (our very own Hack platform) For now, ignore all details! Code syntax 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 0 1 1 1 0 1 1 1 Instruction code (0=“address” inst.) Address ALU operation code ( M-1 ) Destination Code M Jump no jump Code semantics, as interpreted by the Hack hardware platform (1=“compute” inst.) 0000000000000000 1111110111001000 @0 M=M-1 We need a hardware architecture that realizes this semantics The hardware platform should be designed to: Parse instructions, and Execute them.

Computer architecture (Hack platform, approx.) For now, ignore all details! A typical Von Neumann machine

The big picture Software hierarchy Hardware Abstract design Human Assembler Chapter 6 H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 VM Translator Chapters 7 - 8 Computer Architecture Chapters 4 - 5 Gate Logic Chapters 1 - 3 Electrical Engineering Physics Virtual Machine Software hierarchy Assembly Language Hardware Platform Chips & Logic Gates Human Thought Abstract design Chapters 9, 12

Logic design Combinational logic (leading to an ALU) Sequential logic (leading to a RAM) Putting the whole thing together (leading to a Computer) Using … gate logic.

Gate logic Hardware platform = inter-connected set of chips Chips are made of simpler chips, all the way down to elemantary logic gates Logic gate = hardware element that implements a certain Boolean function Every chip and gate has an interface, specifying WHAT it is doing, and an implementation, specifying HOW it is doing it. Implementation Interface

Hardware Description Language (HDL)

The tour ends: Interface One implementation option (CMOS)

Building this world, from the ground up The tour map, revisited Assembler Chapter 6 H.L. Language & Operating Sys. abstract interface Compiler Chapters 10 - 11 VM Translator Chapters 7 - 8 Computer Architecture Chapters 4 - 5 Gate Logic Chapters 1 - 3 Electrical Engineering Physics Virtual Machine Software hierarchy Assembly Language Hardware Platform Chips & Logic Gates Human Thought Abstract design Chapters 9, 12 Course overview: Building this world, from the ground up