Computer System Structures I/O structure I/O software Polling, Poll handshaking Interrupt DMA Blocking, Non-Blocking I/O Buffering    Textbook Silberschatz, Chapter 2

I/O handling by the software. Polling or Programmed I/O Host and I/O device use the Control and Status register bits to communicate each with other with direct and continuous analyze of the status. This is called polling. In many computer architectures, three CPU-instruction cycles are sufficient to poll a device: read a device register, logical-and to extract a status bit, and branch if not zero. Clearly, the basic polling operation is efficient.

Data Intput Register(s) “Write” bit, “Command ready” bit Poll Handshaking Host cannot just send the command or information to the I/O device and be sure that the I/O is done. There is need in some dialog between the host and the device This is a simple handshaking protocol Host Controller Is device free ? Free Command Ready 1 The command arrived 1 The command is “Write” Write = 1 Byte -> DataOut I’m busy now Free = 0 Information to output What to do ? Read Command Command Ready = 1 You can start I/O Write ? Data Intput Register(s) Keyboard Controller Data Output Byte Control “Write” bit, “Command ready” bit Some Logic Status “Free” bit DataOut .Byte -> Do I/O Command Ready = 0 I/O finished I’m free Free = 1

Polling input from keyboard - MIPS lw $s2, 4( $t0) # input device is ready, so read Ready bit = 0(autom.) lui $t0, 0xffff Waiti: lw $t1, 0($t0) # load from the input control register nop andi $t1, $t1, 0x0001 beq $t1, $zero, Waiti # if not yet ready, then loop back

Polling output to keyboard - MIPS # output device is ready, so write sw $s2, 12($t0) Ready bit = 0 (autom.) lui $t0, 0xffff Waito: lw $t1, 8($t0) # load the output control register nop andi $t1, $t1, 0x0001 beq $t1, $zero, Waito # if not ready, then loop back

Polling or Programmed I/O Advantage: This technique is straightforward and simple and could be used when there is no performance requirements or I/O devices are very fast and not too many. Disadvantage: CPU waits the I/O device in a loop and polling becomes inefficient when it is attempted repeatedly yet rarely finds a device to be ready for service, while other useful CPU processing remains undone. Alternative: In such instances, it may be more efficient to arrange for the hardware controller to notify the CPU when the device becomes ready for service, rather than to require the CPU to poll repeatedly for an I/O completion. The hardware mechanism that enables a device to notify the CPU is called an interrupt.

The basic interrupt mechanism works as follows I/O Interrupts The basic interrupt mechanism works as follows The CPU hardware has a wire called the Interrupt-Request Line CPU senses that line after executing every instruction. The device controller raises an interrupt by asserting a signal on the interrupt request line The CPU catches the interrupt and dispatches it to the interrupt handler And the handler clears the interrupt by servicing the device.

Interrupt – driven I/O cycle

Interrupt time line for a single process doing output

MIPS Interrupt Mask Why when we read or write bytes from/to console of SPIM we didn’t met interrupt yet? Mask li $t0, 0xffff0000 # Receiver control register li $t1, 0x00000002 # Interrupt enable bit sw $t1, ($t0) ## Enable Interrupt from keyboard ##

Interrupt handler # This is the exception vector address for MIPS-1 (R2000): # .ktext 0x80000080 # This is the exception vector address for MIPS32: .ktext 0x80000180 # Select the approp. one for the mode in which SPIM is compiled. .set noat move $k1 $at # Save $at .set at sw $v0 s1 # Not re-entrant and we can't trust$sp sw $a0 s2 # But we need to use these registers mfc0 $k0 $13 # Cause register srl $a0 $k0 2 # Extract ExcCode Field andi $a0 $a0 0x1f # Print information about exception. # li $v0 4 # syscall 4 (print_str) la $a0 __m1_ syscall

Direct Memory Access Programmed I/O (PIO) or Interrupt-driven I/O are fine for moving small amounts of data but can produce high overhead when used for bulk data movement such as disk I/O. Many computers avoid burdening the main CPU with PIO by offloading some of this work to a special-purpose processor called a Direct-Memory-Access (DMA) Controller.

Buses The system bus consists of 3 main groups of lines: Address Bus: Transfers the memory address or the device I/O port address Data Bus: Transfers the data between CPU registers, Memory and Device Controllers’ Registers. The data is accompanied with the Address. Control Bus: Signals on these lines show the availability or the direction of sending the Data or the Address. Many lines show the Availability or Absence of some events in the system.

Direct Memory Access To initiate a DMA transfer, the host writes a DMA command block into memory. This block contains: a pointer to the source of a transfer a pointer to the destination of the transfer a count of the number of bytes to be transferred. The CPU writes the address of this command block to the DMA controller, then goes on with other work. The DMA controller proceeds to operate the memory bus directly to perform transfers without the help of the main CPU. When the DMA controller seizes the memory bus, the CPU is momentarily prevented from accessing main memory although it can still access data items in its primary and secondary caches. When the entire transfer is finished, the DMA controller interrupts the CPU. DMA Advantage: CPU does not take care of data transfer. DMA Problems: Hardware implementation of DMA is needed.

Direct Memory Access Modes In burst mode, the DMA controller keeps control of the bus until all the data buffered by the requesting device has been transferred to memory (or when the output device buffer is full, if writing to a peripheral). In single-cycle mode, the DMA controller gives up the bus after each transfer. Advantages, Disadvantages of Burst and Single-Cycle modes Burst mode: CPU is isolated from the bus longer time but large data could be transferred fast. Single-Cycle mode: CPU is not isolated too much from the bus but large data transfer causes the overhead of bus requests.

Blocking (Synchronous) Calls or I/O Disadvantage: As the physical actions performed by I/O devices are generally asynchronous- the I/O takes unpredictable amount of time. Advantage: Nevertheless, most operating systems use blocking system calls for the application interface, because blocking application code is easier to understand than nonblocking application code. When an application issues a Blocking system call, the execution of the application is suspended. It resumes execution when receives the values returned by the system call.

NonBlocking Calls A nonblocking call does not halt the execution of the application for an extended time. Instead, it returns quickly, with a return value that indicates how many bytes were transferred.

Asynchronous Calls The difference between nonblocking and asynchronous system calls is that a nonblocking read() returns immediately with whatever data are available-the full number of bytes requested, fewer, or none at all. An asynchronous read () call requests a transfer that will be performed in its entirety but will complete at some future time. An asynchronous call returns immediately, without waiting for the I/O to complete. The application continues to execute its code. The completion of the I/O at some future time is communicated to the application. Disadvantage: Complexity of implementation. Advantage: The program initiated I/O runs in parallel with the I/O process.

Interrupt before or after data transfer requesting process device driver interrupt handler Hardware Key pressed Key value taken Interrupt before Data Transfer is started The key is pressed on keyboard Interrupt is requested by keyboard controller Interrupt is serviced by OS (application) Key value is taken from the Keyboard Controller Port (Data Transfer) Which type of interrupt generates the mouse ? Which type of interrupt generates the printer ? When you print something on printer When you give the print command with empty paper slot then put the paper in the printer Interrupt after Data Transfer is finished The application requests data to read (write) to the HDD I/O is started and the information flow to the destination is completed Interrupt request is sent from HDD controller The Interrupt is serviced by OS (Application).

Computer System Structures Buffers One way in which the I/O system improves the efficiency of the computer is by using storage space in main memory or on disk via techniques called buffering. A Buffer is a memory area that stores data being transferred between two devices or between a device and an application. Buffering is done for three reasons: To cope with a speed mismatch between the producer and consumer of a data stream. To provide adaptations for devices that have different data-transfer sizes. To support copy semantics for application I/O. Why we need the second buffer ?

Computer System Structures Using the Tools