Jacob R. Lorch Microsoft Research

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Presentation transcript:

Jacob R. Lorch Microsoft Research Operating System Modifications for Task-Based Speed and Voltage Scheduling Jacob R. Lorch Microsoft Research Alan Jay Smith University of California, Berkeley First International Conference on Mobile Systems, Applications, and Services May 7, 2003

Dynamic voltage scaling The ability to quickly and efficiently change CPU supply voltage without rebooting Appearing on commercial CPU’s (Transmeta, AMD, Intel) Reducing voltage reduces energy consumption – E α V2 Lowering voltage necessitates lowering speed When is lower energy worth the lower speed? Operating System Modifications for Task-Based Speed and Voltage Scheduling

Interval-Based Scheduling First proposed by Weiser et al [WWDS ’94] Used commonly today (LongRun, PowerNow!, Enhanced SpeedStep, Windows XP) Approach Divide time into intervals Set speed for upcoming interval based on recent CPU utilization Problem: recent usage says nothing about actual performance requirements (i.e., deadlines) Especially true for one-shot tasks, e.g., responding to user interface events Operating System Modifications for Task-Based Speed and Voltage Scheduling

Task-Based Scheduling Task-based schedulers take into account what tasks are running Knows or estimates their deadlines and performance requirements From this deduce minimum required speed Task-based schedulers have been built Pillai et al [PS ’01] used knowledge of task characteristics in a hard real-time environment Flautner et al [FURM ’00, FRM ’01] estimates when tasks begin and end, determines what speed is necessary to meet estimated deadlines Operating System Modifications for Task-Based Speed and Voltage Scheduling

RightSpeed: Our Task-Based Scheduler for Windows 2000 Applications instrumented to describe their tasks Uninstrumented applications Task information inference via user-interface event interposition System calls to describe task boundaries and deadlines Operating system routines for scheduling speed and voltage CPU capable of dynamic voltage scaling Implemented without OS source code access Novel automatic task detection system Implements PACE scheduling algorithm Operating System Modifications for Task-Based Speed and Voltage Scheduling

Outline Automatic task detector PACE approach to dynamic voltage scaling What it is How processor and system realities necessitate changes to PACE implementation Implementing RightSpeed on Windows 2000 Experimental results Recommendations for processor design to enable greater energy savings Operating System Modifications for Task-Based Speed and Voltage Scheduling

Automatic task detector Inferring task start Use Windows message hooks to see user-interface events Preserve task type information to better predict future tasks Inferring task completion Old approach: track set of threads responsible for event Infer task end when all threads are blocked and no I/O Found to produce the same results most of the time Implementation uses low-priority thread and I/O counter Task: everything system must do in response to a user-interface event Task information database Task type 1 Task type 2 Task type 3 … Sample of recent task CPU requirements; speed schedule How fast should I run? I took this long. Task starts Task ends Operating System Modifications for Task-Based Speed and Voltage Scheduling

PACE Task-based scheduling traditional approach Speed (MHz) Determine speed needed to meet deadline… saves energy by running no faster If task likely short, decrease performance… saves more energy by running slower PACE goes one step further Start a task running slowly, and speed up as the task progresses Performance is the same, but since tasks are often short you save even more energy by usually running even slower From distribution of recent similar tasks, can calculate best way to vary speed: s3 Fc(w) = K 1500 Speed (MHz) 1000 500 25 50 Time (ms) Constant schedule PACE schedule Operating System Modifications for Task-Based Speed and Voltage Scheduling

Computing PACE schedules Obtain sample of recent tasks’ work requirements Weight more recent ones more heavily Infer distribution from sample Compute schedule from distribution and CPU properties Task 1 5.1 Kc Task 2 4.2 Kc Probability Speed Task 3 6.3 Kc Task 4 5.3 Kc … Time Cycles Distribution estimation s3 Fc(w) = K Operating System Modifications for Task-Based Speed and Voltage Scheduling

Challenges of implementing PACE Energy not proportional to speed squared More general equation s2 E’(s) Fc(w) = K Power curve not concave up Ignore certain settings Limited set of settings Round to nearest speed Limited timer granularity Reduce from 10 ms to 1 ms Round schedule phases I/O wait time Accelerate after I/O Requires I/O start/stop notification Operating System Modifications for Task-Based Speed and Voltage Scheduling

Reducing computation time for PACE Pre-computation Limited set of speeds so small set of valid schedules Similar values of K yield the same schedule Formula only used when RightSpeed is installed Binary search for least-energy schedule meeting deadline Only compute when idle Uses low-priority thread K (“performance level”) Operating System Modifications for Task-Based Speed and Voltage Scheduling

RightSpeed on Windows 2000 Task manager driver augments OS with interface allowing applications to describe task information Virtual file system interface RightSpeed library exports task-based interface Infer task information from oblivious applications Automatically load RightSpeed library into each process Interpose user-interface event delivery with message hooks Generate task calls on behalf of unmodified applications Infer completion of tasks use low-priority thread to know when all threads are blocked use filter drivers to determine when I/O is ongoing Compute PACE schedules in low-priority thread Operating System Modifications for Task-Based Speed and Voltage Scheduling

Architecture of RightSpeed Application 1 Application 2 Application 3 … RSLib RSLib RSLib User Mode Kernel Mode RSInit RSIoCnt RSLog RSTask Virtual File System Interface Task Type Group (TTG) File Manager Task Manager Sample Queue Idleness Detection Timer Resolution Automatic Schedules Speed Controller Operating System Modifications for Task-Based Speed and Voltage Scheduling

Experiments Operating System Modifications for Task-Based Speed and Voltage Scheduling

Performance of RightSpeed Filtering I/O operations adds 0.3 — 1.5% overhead OS support for this simple operation would reduce this Decreasing timer granularity adds 0.7 — 1.5% overhead Overhead to perform RightSpeed operations on the order of a few microseconds Schedules achieve goals with high accuracy even though OS is not real-time Delay past deadlines within 0.5% of target Number of deadlines missed within 1.5% of target PACE schedule computation efficient 4.4 μs on AMD, 17.2 μs on Transmeta But… PACE energy savings virtually non-existent! Operating System Modifications for Task-Based Speed and Voltage Scheduling

Efficiency of CPU settings Traditional DVS model Power a cubic function of speed Concavity of power vs. speed Makes intermediate settings very worthwhile to use Efficiency of a setting: savings from using that setting Example 1 GHz setting saves ~50% vs. using 500 MHz and 1.5 GHz If task is short, 500 MHz / 1.5 GHz schedule best; otherwise 1 GHz is Without concavity, intermediate speeds unhelpful 1500 1 GHz Speed (MHz) 1000 500 MHz / 1.5 GHz 500 25 50 Time (ms) Operating System Modifications for Task-Based Speed and Voltage Scheduling

Processor Characteristics TM5400-633 2 of 5 speeds w/ efficiency < 0.5% Mobile Athlon 4 3 of 5 speeds w/ efficiency < 1.5% 2 of those negative, so never useful! Centrino 3 intermediate speeds have 3.7%, 6.0%, 9.8% 1 speed with negative efficiency To benefit from intermediate speeds, processor design should value not just the slope, but also the concavity. Operating System Modifications for Task-Based Speed and Voltage Scheduling

High Speed… in Mobile Processors? Current trend in mobile processors is to reduce the minimum and maximum speed Prolonged use of high speeds can damage chips Improper use of high speeds can tank battery life How can PACE help? Having more speeds available can’t increase energy consumption because PACE computes optimal schedule With PACE, energy consumption may decrease — it can use availability of high speeds to reduce the speed tasks start at Only in rare cases when tasks happen to be long are high-power settings necessary, and then only for milliseconds Operating System Modifications for Task-Based Speed and Voltage Scheduling

Increasing maximum CPU speed Min speed 200 MHz, max… Simulation varying maximum speed of CPU Past/Peg gets worse, but Stepped and PACE improve PACE energy consumption goes down 19.5% by having higher speed available Conclusion: Having high-power settings can save energy with proper scheduling Operating System Modifications for Task-Based Speed and Voltage Scheduling

Conclusions Task-based scheduler can be built on Windows 2000 despite lack of source code Automatic task detector does not require complicated OS interposition Task-based scheduling and PACE calculations can be done efficiently Saving energy using intermediate speeds requires concavity in power vs. speed curve Adding a higher speed to a processor can reduce energy consumption, given intelligent scheduling Operating System Modifications for Task-Based Speed and Voltage Scheduling