ECE 3430 – Intro to Microcomputer Systems ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs Lecture #6 Agenda Today Assembly Language (Assembler Fields and Directives) Listing Files Debugging/Utility Library Instruction Execution Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Fields HC11 Cross-Assembler The HC11 cross-assembler takes assembly source code and translates it to machine code that the HC11 understands. The assembler is run on a standard PC. The cross-assembler reads the text file (*.asm file) and decodes the text depending on which column the text is in. There are four columns that are called assembler fields: 1) Label 2) Opcode 3) Operand 4) Comment Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Fields Label Field Text that is not proceeded by a white space character (i.e., the first character of a line) is treated as a label. A label is a piece of text that gets assigned the memory address of where it is located in the file. This makes tracking memory addresses easier: Ex) $E000 MAIN LDX MAIN $E003 LDX #MAIN … In the above: “MAIN” is assigned the value of $E000 $E000 is substituted everywhere in the code that “MAIN” is typed LDX MAIN Extended Addressing Same as LDX $E000 LDX #MAIN Immediate Addressing Same as LDX #$E000 Labels are commonly used: To address variables allocated in RAM. To provide a target address for branch and jump instructions. Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Fields Opcode Field Text that is proceeded by 1 group of white space (i.e., a tab) is treated as an opcode. Opcodes are specified to the HC11 assembler via mnemonics. Only instruction mnemonics (or assembler directives) can be used in this field. If the assembler does not recognize the mnemonic (it doesn’t exist), it will present an error. Example mnemonics: LDAA, LDX, STAA, STX A list of all mnemonics are given in the pink book. Operand Field Text that follows a mnemonic is treated as an operand (3rd column) LDAA #$FF Operand Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Fields Comment Field Comments are used to make notes about what you are doing. You must comment your code in the lab if you expect the lab instructors to help you. There are a couple of ways to enter a comment: The fourth column of the text file is treated as a comment field. Place a semicolon (;) in front of the comment to make it readable and ensure the assembler treats what follows it as a comment. The assembler disregards comments because they are only for the programmer’s use and are no use to the assembler. Ex) LDAA #$FF ; this instruction loads $FF into ACCA Placing an asterisk (*) as the first character of a line. The entire line is treated as a comment. The asterisk must be fully left-justified. Ex) * start of code * MAIN: LDAA #$FF ; this line will be skipped by the assembler Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives Source Code – When you write a program, you will include additional information besides just instructions. Sometimes the assembler needs more information: 1) Where in memory should the program be loaded? 2) Memory allocation for program data 3) Variable names 4) Global constants 5) Et cetera Directives - We accomplish the above using assembler directives. The assembler directives are specific to the cross- assembler. The assembler recognizes directives as keywords and knows what to do. Directives are not HC11 instructions! Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives Two-Pass Assembler - A cross-assembler reads in the source file in at least two passes (scans the input file twice). Depending on how an assembler or a compiler is written, it may do more than two passes. The two-passes might be as follows: 1st Pass: - Assembler directives concerning program location are decoded and memory locations are setup. - Labels, constants, and variable names are resolved and stored in memory. 2nd Pass - Opcode / operands are decoded and given a memory location of where they are to be downloaded. - Labels, constants, and variable names are substituted in. Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives ORG - This tells the assembler where to insert the program code. Any instructions that follow this directive will be inserted sequentially into memory. Address Machine Code Ex) ORG $E000 $E000 $86 LDAA #$FF -> assemble -> $E001 $FF LDAB #$EE $E002 $C6 $E003 $EE Ex) ORG $0040 RAM: … ; RAM is a label for address location $0040 ORG $E000 ; we now move to $E000 to insert the following LDAA RAM ; ACCA = M($0040), RAM = $0040 Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives END - This tells the assembler that your program ends here Ex) ORG $E000 ; start code at $E000 MAIN: LDAA #$FF ; load ACCA with $FF STAA $0000 ; store $FF to port A CLR $0000 ; store $00 to port A BRA MAIN ; repeat the above two instructions forever END ; this is the end of the code NOTE: The END directive does not have anything to do with program flow, it only tells the assembler when you are done writing your code. This directive is not required. Once the assembler hits the END directive, it quits processing your input file. Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives RMB - Reserve Memory Byte. This reserves a block of memory for use as program data and variables. It does not initialize the memory locations. Ex) ORG $0040 VAR1 RMB 2 ; reserve a 16-bit variable VAR2 RMB 1 ; reserve an 8-bit variable ORG $E000 ; start code at $E000 LDAA VAR2 ; put contents of $0042 into ACCA … Address Machine Code $0040 $?? -> VAR1 lives at $0040 $0042 $?? -> VAR2 lives at $0042 … $E000 $B6 $E001 $00 $E002 $42 -> note that an unknown value is loaded into ACCA Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives FCB - Form Constant Byte. This reserves a byte of memory and initializes the byte to a certain value. Ex) ORG $0040 ; start code at $0040 VAR1 FCB $12 ; reserve and insert $12 into $0040 VAR2 FCB $11,$22 ; reserve the next two bytes and insert… ORG $E000 LDAA VAR1 LDX VAR2 LDY #VAR2 … Address Machine Code $0040 $12 -> variable VAR1 lives here $0041 $11 -> variable VAR2 lives here $0042 $22 After the LDY instruction, A = $12, X = $1122, and Y = $0041 Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives FDB - Form Double Byte. Same as FCB but will allocate and initialize 2 bytes. Ex) ORG $E000 ; start code at $E000 NUM1 FDB $1234 ; reserve and insert $1234 NUM2 FDB $11 ; reserve and insert $0011 Address Machine Code $E000 $12 -> variable NUM1 lives here $E001 $34 $E002 $00 -> variable NUM2 lives here $E003 $11 Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives FCC - Form Constant Character. Will reserve memory and insert the ASCII code for the text given. Ex) ORG $E000 ; start code at $E000 ALPHA: FCC ‘DEF’ ; reserve and insert ASCII code address machine code $E000 $44 -> Labeled “ALPHA” $E001 $45 -> Labeled “ALPHA + 1” $E002 $46 -> Labeled “ALPHA + 2” $E003 $?? NOTE: The ASCII code for : D = $44 E = $45 F = $46 (see ASCII table) Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Assembler Directives EQU - This equates one value or label with another value or label. Establishes an alias. Ex) VAR1 EQU $FF VAR2 EQU $ABCD VAR3 EQU VAR1 ORG $E000 ; start code at $e000 LDAA #VAR1 ; ACCA = $FF LDAB VAR2 ; ACCB = M($ABCD) LDAB VAR3 ; ACCB = M($00FF) … NOTE: The assembler will insert $FF for VAR1, $ABCD for VAR2, and $FF for VAR3 on the 2nd pass through the source code. Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Lab Setup Putting it all together may look like this… * This is a program that will load the contents of memory location * $0041 and store the contents back to $0040 continuously. * Matt Laubhan * ECE 3440 * Date: 9/16/2009 RAM EQU $0040 ; setting up label for address $0040 EEPROM EQU $E000 ; setting up label for address $E000 ORG RAM VAR1 RMB 1 ; setting up variable called “VAR1” VAR2 FCB $00 ; setting up variable called “VAR2” and init to zero TEXT FCC ‘Hi’ ; setting up variable called “TEXT” and init to ASCII string ORG EEPROM ; start code at the the EEPROM address MAIN LDAA VAR2 ; ACCA <- M(VAR2) = M($0041) STAA VAR1 ; M(VAR1) = M($0040) <- ACCA BRA MAIN ; branch always back to “MAIN” END ; the code is done here Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

ECE 3430 – Intro to Microcomputer Systems Listing Files Example listing file (optional output from assembler, useful in debugging): … 0111 0040 ORG RAM 0112 0040 VAR1 RMB 1 0113 0041 55 VAR2 FCB $55 0114 0115 e000 ORG EEPROM 0116 0117 e000 0f [2] MAIN: SEI 0118 e001 86 04 [2] LDAA #4 0119 e003 97 3f [3] STAA CONFIG 0120 e005 8e 00 ff [3] LDS #STACK 0121 e008 bd f0 a0 [6] JSR INIT Five columns of data are appended to the left of the original assembly source code: Line number Address in memory Opcode Operands Cycle count for instruction Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Debugging/Utility Library The debugging/utility library provides subroutines that you can call. You debug—not your instructor! Syntax: JSR <subroutine name> Debugging/utility library-provided subroutines: DMPREG: dumps contents of all CPU registers and stack to PC terminal DMPMEM: dumps selected memory contents to PC terminal DMPRM: equivalent to calling DMPREG and DMPMEM one after another PAUSE: suspends code execution until a key is pressed on the PC keyboard OUTSTRG: outputs a terminated string of ASCII characters OUTSTRGN: outputs a non-terminated string of ASCII characters (n characters) OUTCRLF: outputs a carriage return and line feed (new line) to PC terminal INCHAR: waits until a key is pressed on the PC keyboard and returns the ASCII SNDBYTE: sends a single ASCII value to the PC terminal OUTA: sends two ASCII values representing the hex value stored in ACCA to PC terminal Primarily for Debugging Primary for Utility Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Assembling/Linking/Downloading to HC11 Using the debugging/utility library requires that extra code you didn’t write be linked into your S19 file before downloading to the Microstamp. The exact steps you must follow to assemble your source file, link in the debugging/utility library, and downloading to the Microstamp will be discussed in lab. Details are available on lab web page. Write ASM Source File Assemble with Assembler (asm11.exe) Link in Debugging/Utility Library (linkutils.exe) *.asm *.s19 *.lst *l.s19 Download to Microstamp (ms11download.exe) Listing File Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Instruction Cycles A single HC11 instruction will involve 1 or more of these cycles. Read Cycle – Process of accessing memory to retrieve data or program instructions. The data goes from memory to registers. Write Cycle – Process of storing a value in memory. The data goes from registers to memory. Instruction Cycle – Process of the CPU executing parts of the instruction (including read and write cycles). All instructions will at least perform one READ to retrieve the opcode for the instruction to be executed. The PC will be pointing to where the instruction is located. PC Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Instruction cycle during a LDAA $FF00 or STAA $FF00 (extended addressing) – Setup: the program resides starting at memory location $E000 Memory 3 bytes: LDAA $FF00 = $B6, $FF, $00 or 3 bytes: STAA $FF00 = $B7, $FF, $00 $E000 $B6/$B7 $E001 $FF $E002 $00 - $FF00 $BB CPU Address Bus Memory Data Bus PC = $E000 Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Step 1 - The value in memory that the PC is pointing to is put onto the address bus PC($E000). - A request to read the contents of that memory location is initiated by the CPU. Step 2 - The 8-bit opcode (located at $E000) is put onto the data bus and returned to the processor ($B6 for LDAA/$B7 for STAA). Memory is driving the data bus. - The control unit in the CPU decodes the operand and recognizes the instruction is a load to ACCA using extended addressing or a store from ACCA using extended addressing. - The control unit increments the PC by 1 ($E001). The recently-decoded opcode tells the CPU that what comes next in memory is data. Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Step 3 - The control unit knows that the load or store instruction is using extended addressing. This means that it must read the next two bytes of information in memory to get the 16-bit address. - A read is performed on PC ($E001), the data is stored in the CPU. PC is incremented. - Another read is performed on PC ($E002), the data is stored in the CPU. PC is incremented. The PC now resides at the location of the opcode for the next instruction ($E003). Step 4 - The address that is in memory ($FF00) is put onto the address bus with a request to read from that address (if a load) or to write to that address (if a store). - The content of $FF00 ($BB) is put onto the data bus (by the memory system) and loaded into ACCA (for LDAA). - The content of ACCA is put onto the data bus (by the uC) and stored to $FF00 (for STAA). Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution # of Clock Cycles - One read cycle to fetch opcode at $E000 = 1 clock cycle - Two read cycles to fetch operands at $E001 & $E002 = 2 clock cycles - One read cycle to fetch the data at $FF00 (LDAA) or one write cycle to store the data to $FF00 (STAA) = 1 clock cycle --------------------- 4 clock cycles to perform LDAA/STAA $FF00 Clock Timing - In one uC E-clock cycle, an address can be put on the address bus, decoded by memory circuitry, and the contents of that address presented back across the data bus to the uC (this is a read cycle). In one uC E-clock cycle, an address can be placed on the address bus, decoded by memory circuitry, and the new contents driven by the uC across the data bus (this is a write cycle). - The pink book tells how many clock cycles each instruction takes: LDAA (IMM) = 2 clock cycles (DIR) = 3 (EXT) = 4 (INDX) = 4 (INDY) = 5 Uses a 2-byte opcode Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Instruction cycle during a LDAA #$FF (immediate addressing) – Setup: the program resides starting at memory location $E003 Memory 2 bytes: LDAA #$FF = $86, $FF $E003 $86 $E004 $FF - CPU Address Bus Memory Data Bus PC = $E003 Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Step 1 - The value in memory that the PC is pointing to is put onto the address bus PC($E003). - A request to read the contents of that memory location is initiated by the CPU. Step 2 - The 8-bit opcode (located at $E003) is put onto the data bus and returned to the processor ($86). Memory is driving the data bus. - The control unit in the CPU decodes the operand and recognizes the instruction is a LOAD ACCA using immediate addressing. - The control unit increments the PC by 1 ($E004). The recently-decoded opcode tells the CPU that what comes next in memory is the immediate data (the data that should be loaded into ACCA). Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009

Instruction Execution Step 3 - The control unit knows that the LOAD instruction is using immediate addressing. This means that it must read the next one byte of information in memory and that is what goes in ACCA. - A read is performed on PC ($E004), the data is outputted onto the data bus for the CPU to read. This information is stored in the ACCA. PC is incremented. - Because ACCA is 8-bits wide, the instruction is complete. The PC now resides at the location of the opcode for the next instruction ($E005). # of Clock Cycles - One read cycle to fetch opcode at $E003 = 1 clock cycle - One read cycle to fetch operand at $E004 = 1 clock cycle --------------------- 2 clock cycles to perform LDAA #$FF Lecture #6 ECE 3430 – Intro to Microcomputer Systems Fall 2009