Current DCC Design LED Board Total of 10 daughter-boards on motherboard Only 5 LRBs used (up to 15 HTR inputs) Overflow Warning Fast Busy To TTS LED Board

Current DCC Status / Risks Proven design, only minor changes since TB2002 version Enough parts in hand for ~32 DCCs (including all of various revision units out in test stands, etc) Logic boards not yet purchased Risks Firmware maintenance is a problem 3 designers, 6 distinct PLD designs, mixed vendors PCI busses are complicated and not as useful as originally foreseen Some outstanding not-understood bugs in LRBs Long-term reliability is in doubt due to connectors 45 mated pairs (2,880 contacts!)

Current DCC Production Tasks Production tasks remaining for 32 units: Fab/assemble 30 more DCCv5 logic boards Assemble LED and TTC/TTS jumper boards Reclaim all parts from test-stands, etc Laser engrave front panels Assemble and test 32 units Production tasks for additional units Produce more Motherboards Produce more LRBs (Produce more logic boards) Assemble and test

New DCC Block Diagram Spartan 3 4 HTR inputs VME64xP (Buffers) FPGA 4 HTR inputs DDR2 SDRAM VME64xP (Buffers) Event Builder FPGA XC4VLX25-4FF668 Spartan 3 FPGA SLink64 Spartan 3 FPGA Maryland TTCrx Mezzanine CPLD Flash Spartan 3 FPGA Extra HTR (calib) input

New DCC Design Details Spartan-3 can de-serialize channel-link signals Tested by us in Virtex 2 so far (technique described in Xilinx app notes) Burst data rate of 40MHz*2*12 = 960MB/sec can easily be handled by DDR memory Virtex 4 simplifies DDR interface (V-2 ok too) Available now: already have 10pc in stock Software is much simpler without PCI busses Can comply with C. Schwick's rules - VME64xP All significant logic on one FPGA Event builder firmware largely unchanged Significant simplification by removing PCI busses

New DCC Status / Engineering Status - Conceptual Design Only Engineering Tasks (in rough order Complete schematic design Much comes from existing DCC, new VME stuff Assign FPGA pins to banks (noting clocks, DCI etc) Layout / Fab / Assemble prototype PCB Firmware Deserializer (simple in principle, but...) Event builder (DDR2 interface) similar to existing one VME64xCMS interface

New DCC Advantages Proposed mods make production and maintenance much simpler Impact on M&S cost is negligible - new DCCs are much cheaper Relatively little new firmware is needed Can comply with CMS VME rules - simpler software Prototype could be ready soon

Ethernet Output A gigabit ethernet output has been suggested for local DAQ. How could this be done? Current DCC: Add Virtex II Pro chip or commercial MAC chip to logic board, wire connector to front panel Problem: DCC FPGA has no free pins... need bigger pkg New DCC Add Virtex II Pro chip or commercial MAC chip to main board. Connector may or may not fit! Firmware effort is the same in either case