Mark 5 / VLBA Correlator Topics 2006/2/23 VLBA 4-Gbps Upgrade Jon Romney NRAO, Socorro EVN DBBC CDR Bologna 2007 / 4 / 24 2007 / 4 / 24 J. D. Romney

VLBA 4-Gbps Upgrade Overview Replace All Equipment Downstream from IFs Wideband Sampler/Filter module. 2x 500-MHz inputs; 4-Gbps output. Replacing BBCs / Samplers / Formatter. Further details to follow. Wideband Recording system. Disk-based; 4-Gbps capacity; “Mark 5C”. Compatible with existing Mark 5 module pool. Wideband Correlator. Stand-alone mini-WIDAR – OR – software/cluster system. Wider bandwidth / higher spectral resolution / more flexible. 2007 / 4 / 24 – jdr EVN DBBC CDR

VLBA 4-Gbps Upgrade Funding & Schedule Funding Status Wideband Sampler/Filter module. Design development funded. Implementation funding requested*. Wideband Recording system. Design funding requested*. Wideband Correlator. Software correlator completion funded. Implementation funding requested* for intermediate cluster. * funds requested from GBT track warranty arbitration payment. Target Completion Date … for all 3 prototypes: 2007 / 12 / 31. 2007 / 4 / 24 – jdr EVN DBBC CDR

Wideband Sampler/Filter Basic VLBA Requirements IF Input Minimal: 2 x 500 MHz. Optional: 4 x 500 MHz for dual-band dual-polar (etc.) modes. Sampling Sample clock: 1024 MHz. Sample precision: 8 bits. Filtering: Two Selectable Modes Polyphase filter bank, spanning contiguous 500-MHz band. Tunable “digital BBC” filters: 8 (possibly 16). Bandwidths 62.5 kHz – 256 MHz / tunable to 1% of bandwidth. Output truncation: 1 – 8 bits/sample. 2007 / 4 / 24 – jdr EVN DBBC CDR

Wideband Sampler/Filter Concept History Original Exploit experience developed at NRAO from EVLA project. Adapt relevant portions of EVLA data transmission system & correlator designs. Haystack Collaboration Similarities to Haystack DBE recognized. Joint development of “DBE-2” selected as excellent opportunity for collaboration. … at first NRAO/Haystack Technical Meeting, 2006 / 10 / 25 – 26. 2007 / 4 / 24 – jdr EVN DBBC CDR

Wideband Sampler/Filter VLBA Concept History [2] Modification for VLBI-2010 Requirements Doubled input bandwidths to total 4 x 1 GHz. Doubled sampler clock to 2048 MHz. Added 10G Ethernet output, channel-packetized. Required largest Xilinx Virtex 5 chip & corner-turner memories. Required 2-board configuration for full capability. 2007 / 4 / 24 – jdr EVN DBBC CDR

Most Recent NRAO-Haystack “DBE-2” Block Diagram 2007 / 4 / 24 – jdr EVN DBBC CDR

Wideband Sampler/Filter VLBA Concept History [3] Impact of iBob-2 Discovered Casper group’s iBob-2 development recently. Recognized similarities to most recent NRAO-Haystack board. Development timescale a concern at NRAO. Had hoped to complete prototype board by 2007 / 9 / 30. Resolution currently not clear. 2007 / 4 / 24 – jdr EVN DBBC CDR

Compatibility & Collaboration Considerations Compatibility among DBBC/DBE Devices NOT nearly as critical as recording systems. No media to be interchanged. But identical filter profiles important for optimal baseline closure. Possible global agreement on filter characteristics. Would require all devices to support same minimum number of taps. Collaboration on Common Elements Possible sharing of FPGA code for filters. Would require all devices to use compatible FPGAs. 2007 / 4 / 24 – jdr EVN DBBC CDR

Thank you 2007 / 4 / 24 – jdr EVN DBBC CDR