LAPP BPM Read-out Electronics

Slides:



Advertisements
Similar presentations
LAPP electronics developments Jean Jacquemier, Yannis Karyotakis, Jean-Marc Nappa,, Jean Tassan, Sébastien Vilalte. CLIC WS 12-16/10/2009.
Advertisements

S. Smith LCLS Facility Advisory April 16, BPMs and Toroids Facility Advisory Committee April 16, 2007 System overview.
LKr readout: present and future R. Fantechi 30/8/2012.
The TIMING System … …as used in the PS accelerators.
Front-end amplifiers for the beam phase loops in the CERN PS Alessandro Meoli (CERN BE/RF/FB) Supervised by Heiko Damerau 21 April CERN.
Upgrade developments in Clermont-Ferrand Romeo Bonnefoy and François Vazeille Tilecal upgrade meeting (CERN, 13 June 2014) ● Handling tools ● Deported.
ATF2 Q-BPM System 19 Dec Fifth ATF2 Project Meeting J. May, D. McCormick, T. Smith (SLAC) S. Boogert (RH) B. Meller (Cornell) Y. Honda (KEK)
Proposal of new electronics integrated on the flanges for LAr TPC S. Cento, G. Meng CERN June 2014.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
TE-MPE-EP, VF, 11-Oct-2012 Update on the DQLPU type A design and general progress. TE-MPE Technical Meeting.
Saverio Minutoli INFN Genova 1 1 T1 Electronic status Electronics Cards involved: Anode Front End Card Cathode Front End Card Read-Out Control card VFAT.
Tim Ikin 11 th October ND SKADS Workshop 2-PAD Analogue Front End Tim Ikin Electronics Engineer 2 nd SKADS Workshop Paris 11 th October 2007.
Anatoli Konoplyannikov Design and integration of HV, LED monitoring and calibration system for HCAL Overview of the subsystems design High voltage.
CTF3 BPMs October 18-22/2010 IWLC2010 CTF3 BPMs Lars Soby 1.
BI day 2011 T Bogey CERN BE/BI. Overview to the TTpos system Proposed technical solution Performance of the system Lab test Beam test Planning for 2012.
CLEX TBM T0 Cooling system Progress Report 1 V. Soldatov, A. Vamvakas, BE-RF
R. Fantechi. TDAQ commissioning Status report on Infrastructure at the experiment PC farm Run control Network …
MICE RF System Power Supplies, Control and Monitoring Status report February 2012 Chris White, STFC Daresbury Laboratory MICE Collaboration Meeting CM32,
The ATF Damping Ring BPM Upgrade Nathan Eddy, Eliana Gianfelice-Wendt Fermilab for the ATF Damping Ring BPM Team.
Acquisition system for the CLIC Module. Sébastien Vilalte.
TeV BLM Review 4/19/041 Tevatron BLM Review - Schedule BLM Replacement Prototype schedule: Provide prototype digitizer cards, crate, readout path by ~
TBL BPMs: electronics Antoni Gelonch, Yuri Kubyshin, Xavier Millán, Gabriel Montoro CTF3 Collaboration MeetingCERN, January 16-17, 2007 In collaboration.
Beam Line BPM Filter Module Nathan Eddy May 31, 2005.
1 ATF Instrumentation Status and Planning Justin May, Juan Cruz, Doug McCormick, Janice Nelson, Tonee Smith, John Wray 1.
CLIC09 Workshop October 2009Drive beam BPM’sLars Søby 1 Drive Beam BPM’s CLIC 09 work shop, CERN, of October 2009, Lars Søby.
07-Jan-2010 Jornadas LIP 2010, Braga JC. Da SILVA Electronics systems for the ClearPEM-Sonic scanner José C. DA SILVA, LIP-Lisbon Tagus LIP Group * *J.C.Silva,
OPERA TT MEETING BRUSSELS, April 11, 2003 Status of the OPERA DAQ Status of the OPERA DAQ D.Autiero, J.Marteau T.Descombes  informatics S.Gardien, C.Girerd,
Beam diagnostics developments at LAPP: Digital part CTF3 Collaboration Meeting Louis Bellier, Richard Hermel, Yannis Karyotakis, Jean Tassan,
Target Commissioning Target installed in ISIS “Demonstrator” target in R78 Initial commissioning plans Chris Booth Sheffield 11 th February 2008.
CSC ME1/1 Patch Panel Interconnect Board (PPIB) Mikhail Matveev Rice University February 27, 2013.
News from LAL on Vacuum System Racks for cryotraps: call for tender done provider selected purchase of electro-tech components in progress prototype expected.
11 th February 2008Brian Martlew EPICS for MICE Status of the MICE slow control system Brian Martlew STFC, Daresbury Laboratory.
BPM stripline acquisition in CLEX Sébastien Vilalte.
Plans to Test HBD Prototype in Run 6 Craig Woody BNL DC Meeting March 8, 2006.
TE-CRG Interfaces Fair S-FRS magnets - CERN cryogenics Control interface CERN-GSI for B.180 cryogenics Control interface CERN-GSI for B.180 cryogenics.
LAPP BI Read-out electronics Jean Jacquemier, Yannis Karyotakis, Jean-Marc Nappa,, Jean Tassan, Sébastien Vilalte. CLIC BI WS 02-03/06/2009.
ATF DR BPM Upgrade Janice Nelson, Doug McCormick, Justin May, Andrei Seryi, Tonee Smith, Mark Woodley.
Standard electronics for CLIC module. Sébastien Vilalte CTC
Rutherford Appleton Laboratory September 1999Fifth Workshop on Electronics for LHC Presented by S. Quinton.
Status of LAV electronics commissioning Mauro Raggi, Francesco Gonnella Laboratori Nazionali di Frascati 1 Mauro Raggi - Laboratori Nazionali di Frascati4.
Sumary of the LKr WG R. Fantechi 31/8/2012. SLM readout restart First goal – Test the same configuration as in 2010 (rack TS) – All old power supplies.
Outline Upgrade status of the ECAL/HCAL HV control mezzanine board;  Firmware design,  Setup for making functional tests and validation FPGA firmware.
S. Smith LCLS Facility Advisory October 12, Beam Position Monitors Facility Advisory Committee October 12, 2006.
Plans for the UT Installation LHCb infrastructure workshop February Burkhard Schmidt for the UT group.
BRAN at IR2 and IR8: status, commissioning and operation Enrico Bravin AB-BI Joint LHC Machine-Experiments Workshop on Very Forward Detectors 25 January.
Laser Control Status A. Masi, T. Feniet, K. Szczurek Awake Technical Board November 12 th 2015 Thanks for inputs from: M. Donze`, V. Fedosseev, C. Hessler.
V Review SPARC Diagnostic & Control Status G. Di Pirro On behalf control and diagnostic group.
SKIROC status Calice meeting – Kobe – 10/05/2007.
ELENA installation progress F. Butin / ELENA collaboration.
Clermont-Ferrand requests for the Test Beam Vidyo meeting, 29 July 2015 François Vazeille -Remote HV System -Front End electronics Hypothesis: Some Mini-Drawers.
September 5, Burkhard Schmidt Integration and Installation Outline: Integration and Infrastructure issues -Suspended platforms -Cable chains -Beam.
PADME Front-End Electronics
Beam diagnostics from GSI
CLEX Building Layout, Conventional Facilities, TL2, TL2’,
Jorge Sánchez-Quesada BE-RF-FB
PLC-based control systems at SOLEIL - ICALEPCS 2017
CLEX* Status and Plans CTF3 complex CLEX
News about the WA104 Programme
Injectors BLM system: PS Ring installation at EYETS
T1 Electronic status Conclusions Electronics Cards:
AWAKE proposals for BE/BI
Status of the OPERA DAQ D.Autiero, J.Marteau T.Descombes  informatics
The ELENA BPM System. Status and Plans.
Mini-drawers, FE-ASIC , Integrator
WP02 PRR: Master Oscillator and RF Reference Distribution
LCLS Cavity BPM Electronics Undulator Week January 22, 2008
Tests Front-end card Status
Report on ATF2 Third Project Meeting ATF2 Magnet Movers ATF2 Q-BPM Electronics Is SLAC ILC Instrumentation Group a good name?
The ATLAS LAr. Calibration board K. Jakobs, U. Schaefer, D. Schroff
LCLS Control System Personnel Linac & BC2 Controls progress
Presentation transcript:

LAPP BPM Read-out Electronics Louis Bellier, Jean Tassan, Sébastien Vilalte CTF3 technical meeting 21-01-2008

Total of 16 analog modules and 29 digital front-end. Foreseen equipments For April, LAPP electronics to be installed: TL2: 6 analog + digital for BPIs. 5 digital for 40mm BPMs (analog provided by CERN). 2 digital for BPR & WCM. TL2’: 4 digital for 40mm BPMs (analog provided by CERN). TBL: 2 digital for 40mm BPMs (analog provided by CERN). TBTS: 10 analog + digital for Uppsala 40mm BPMs. Total of 16 analog modules and 29 digital front-end. 21/01/2008 CTF3 technical meeting

Foreseen equipments: racks The digital front-end boards can be grouped up to 6 due to the Ethernet daisy chain link → use of 19” racks. A rack can host up to 6 digital boards and an extra distribution board provides signals: power supplies, clock, blocking, calibration. → divides the number of cables. For TL2/CLEX we will group 4 boards in each rack → 9 racks to be installed under the girders. See Lars Søby for layouts. → 2 possible remaining boards in a rack. Lapp provides all cables from analog modules to DFE and from distribution board to DFE. 21/01/2008 CTF3 technical meeting

Architecture Digital Front-end Analog Front-end Analogue Distribution 2 Calibration Signals 3 ΔV, ΔH, Σ Power supplies Clk Blk Calibration pulse Analogue 4 1 Power supply and control SPECS Bus 19” CRATE ~100 meters Digital Front-end Calibration enable Distribution board X4 5 6 21/01/2008 CTF3 technical meeting

Analogue Front-end 21/01/2008 CTF3 technical meeting

Distribution board 21/01/2008 CTF3 technical meeting

Lapp Digital front-end board 21/01/2008 CTF3 technical meeting

Specs PCI Board 21/01/2008 CTF3 technical meeting

Point on the activity ANALOG MODULES: 16 modules, 20 in production → 4 spares. - boards currently in wiring. - mechanical engineering ok. - compensation filters and gains to be implemented and tested (BPM ≠ BPI) - All cables already ordered or received. after assembling, individual tests of signal processing with controls switching. 21/01/2008 CTF3 technical meeting

Point on the activity DIGITAL FRONT-END: 28 boards needed for 2008 but 50 in production → 43 foreseen for the whole machine and 7 spares. - boards currently in wiring. - front panels currently in production. - software issues: adjustments and improvements to be performed on a first 4 boards rack according to the read-out system (network, FESA framework…). Implementation of a blocking delay control for each board. Louis Bellier is leaving end january: LAPP supports digital activities with the aid of a part-time digital electronics technician Jean Marc Nappa. 21/01/2008 CTF3 technical meeting

Point on the activity RACKS AND DISTRIBUTION: 9 racks, 9 distribution boards, 11 foreseen in production → 2 spares. - racks ordered. To be assembled at reception. power supplies distribution to be implemented. - front panels currently in production. - tests with 4 and 6 digital boards to be finalized. - All cables already ordered or received. 21/01/2008 CTF3 technical meeting

Point on the activity SOFTWARE APPLICATIONS: Jean Jacquemier To drive the front-end and plot data, LAPP develops two applications : - A JAVA application dedicated to the control of DFE: “specialist requirements” (gain, attenuation, blk delay…). - The acquisition application on the gateway FESA server. A third, “trajectory”, a JAVA application to be defined. 21/01/2008 CTF3 technical meeting

Dates and conclusions MILESTONES: - We foresee a full rack for debug for end February. → test of an acquisition chain from pick-up to control room display. - 9 racks for April with final versions of DFE soft and a first version user applications. CONCLUSION: though the work still to provide, we think we will be on time for the beam. 21/01/2008 CTF3 technical meeting