ECE 3430 – Intro to Microcomputer Systems ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs Lecture #5 Agenda Today Branch/Compare Introduction MSP432 I/O LaunchPad I/O MSP432 Memory Map Lab Introduction Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Branch/Compare Instruction Introduction In order for CPUs to make decisions, they need to support conditional execution. In the ARM processor, making a decision involves comparing two values (a and b) and then conditionally changing the program counter (PC) based on their relationship. Kinds of decisions: a == b (equal to) a != b (not equal to) a > b (greater than) a >= b (greater than or equal) a < b (less than) a <= b (less than or equal) Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Branch/Compare Instruction Introduction The values of a and b are set by way of a comparison instruction. Compare (CMP) -> there are others too (like CMN, TST, …) Ex: CMP a, b (a ? b) Both a and b of an inequality (>, <, >=, <=) are interpreted as either signed or unsigned—one cannot be signed and the other unsigned—as this would make no sense. Branch instructions select the equality or inequality and conditionally change the program counter. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Branch/Compare Instruction Introduction a == b (equal to) BEQ a != b (not equal to) BNE a > b (greater than - signed) BGT a > b (higher than – unsigned) BHI a >= b (greater than or equal - signed) BGE a >= b (higher than or same – unsigned) BHS a < b (less than - signed) BLT a < b (lower than – unsigned) BLO a <= b (less than or equal - signed) BLE a <= b (lower than or same - unsigned) BLS Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Branch/Compare Instruction Introduction The comparison subtracts the right operand from the left operand, adjusts the N, Z, V, and C flags (latching them into the PSR), and then throws away the result: CMP R0, R1 ; perform R0 - R1, examine result, adjust flags ; R0 and R1 are not modified The subtraction operations do the same—but write the result back to R0. In the ARM, the ‘S’ suffix may need to be added to non-comparison instructions to force flags to change. Ex: ADDS and SUBS Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Branch/Compare Instruction Introduction Immediately following a compare instruction, one of the branch instructions is used. The branch instruction looks at different flags (and combinations of flags) to determine if the PC should be changed or not. CMP R0, R1 ; perform R0 - R1, examine result, adjust flags ; R0 and R1 are not modified BEQ SKIP ; evaluate R0 == R1 NEXT: … ; branch does nothing if R0 != R1 and this ;executes next B REJ ; branch always (unconditional) SKIP: … ; branch re-directs the PC to this line if R0 == R1 REJ: … ; regardless of path, execution rejoins here Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Atomic Operation A single CPU instruction is “atomic”. This is a word used in computer science to mean that nothing can interrupt this instruction (except a power failure of course). Anything else that wants to happen must wait for the current instruction to complete once it is started. This is a fundamental rule in all CPU architectures! Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Input and Output (I/O) MSP432 Ports - There are many varieties of the MSP432—each of which can have different I/O definitions. Our 100-pin version of the MSP432 has 10, 8-bit I/O registers. Other versions may have multiple I/O registers. These I/O registers are called ports. Not all pins of all ports may be accessible due to packaging. Ports are data latches that exist outside of the ARM CPU core (but still inside the microcontroller). Each port is assigned a designated memory location. When a load or a store operation targets the address belonging to a port register, the data is read from or written to the data bus—reading input pins and/or adjusting the state of output pins. Directionality of bi-direction I/O pins must be specified in a data direction control register. I/O pins can have multiple purposes (see data sheets). You may have to specify the purpose of the pin too either directly or indirectly. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Input and Output (I/O) Therefore, gathering data from an external device or writing data to an external device is accomplished by loading from and storing to dedicated memory locations. For this reason, the MSP432 uC is referred to as a memory-mapped architecture. We are using the MSP432P401R in a 100-pin package. Most (perhaps all) of all 10 ports are available—unless the pin is being used with an alternate function. If more I/O pins are required, various forms of I/O expansion logic can be added (such as shift registers or I2C-based I/O expanders). Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems LaunchPad LaunchPad - This is the target board that the MSP432 is loaded on. The target board is a printed circuit board (PCB) that contains all of the necessary peripheral circuitry (crystal oscillator [clock], power regulators, USB interface, etc.) The LaunchPad provides: 1) Connectors for I/O and USB. 2) Power comes across the USB cable. 3) Crystal oscillator [XTAL]. 4) Voltage Regulators. 5) USB endpoint and emulation logic (used to interface to a host computer for programming and debugging). 6) A few push buttons (one is the reset button). 7) A few LEDs. See MSP432 LaunchPad link on course web page. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems MSP432 Memory Map The MSP432 is a memory-mapped architecture—all I/O is done as though you are interacting with a memory device. The MSP432 internal Flash (which we’ll use for program code storage) is mapped to a particular memory range. The MSP432 has some internal RAM (which we’ll use for program data storage) which is also mapped to a particular memory range. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Memory Map – Code Zone Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Memory Map – SRAM Zone Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Memory Map – Peripheral Zone Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Memory Map – Code Zone – Flash Area Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Memory Map – Code Zone – SRAM Area Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems MSP432 Memory Map The interrupt vector table will be discussed in detail later. All architectures have one! At least certain parts of this vector table must be in non-volatile memory! The 8 and 16-bit peripheral modules sections map to the on-chip peripheral devices: which are outside of the CPU—but still inside the MSP432 uC. Size of access must be correct. Grouped together to not waste memory space. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Port I/O For port I/O, many peripheral registers may need to be configured. Primarily PxSEL, PxDIR, PxOUT, PxIN (where x is replaced with the port number). These names are defined by headers included by you. We use these names because they agree with convention and documentation. P1SEL: Setting pin function (for I/O and not alternate purpose) P1DIR: Defines the direction of each I/O pin (input or output) By default, all I/O pins that have configurable direction are inputs! P1OUT: Data to be written goes here (outputs change). No effect on input pins. P1IN: Sample I/O pins through here Register is volatile (because external asynchronous events can change inputs). Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Port I/O There are many other I/O configuration registers that may be of interest. The MSP432 architecture allows for specification of internal pull-up and pull-down resistors and interrupt use (PxREN). See the MSP432 Family User’s Guide course link for more information. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

MSP432 Interaction with PC We will be using an integrated development environment (IDE) in the lab. This may come from one of several vendors. Regardless of choice, this software package contains: C/C++ compiler Assembler Linker Downloader Debugger All communication with the LaunchPad is done via USB. Your lab instructor will discuss the use of the IDE further with you in lab. Some MSP432 IDEs available: IAR Embedded Workbench Keil uVision TI Code Composer Essentials Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Basic Code Development Process Set up a workspace and project. A workspace can contain multiple projects. In this course, you’ll probably only have one project within the workspace. Write the CPU source code in language of choice using text editor. In this class we will be writing mostly in assembly—but could be C or C++! Source code is always “plain text” format (don’t use word processors)! Upon a successful build, you will get many auto-generated files. These auto-generated files may include: Intermediate object files fed to the linker (one object file for each source file). The final binary for download. Symbol files (for debugging). A “listing file”. Download (and optionally debug) the source code using the IDE. A full-blown assembler reference guide (PDF) can typically be found in the help menu For your IDE. Each IDE may use different assemblers that understand subtly different syntax and directives. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Lab Introduction We are not concentrating on the breadboard too much this semester (take ECE 3440 if you want to interact with cooler things). This class will focus more on the internals of the MSP432. The breadboard is only there to give us some form of I/O to interact with. The LaunchPad can be interfaced to the breadboard via a ribbon cable and connectors. Power is provided to your breadboard via the ribbon cable. Never attach your breadboard to power supplies! Let the LaunchPad power the breadboard. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Lab Introduction See previous lecture material and text book for coding examples. In addition to R0-R12, additional variables can be declared in SRAM. Constants should be defined in external Flash memory. Use all available internal CPU registers before resorting to SRAM. Lecture #5 ECE 3430 – Intro to Microcomputer Systems Fall 2015