Lecture No. 27 Sequential Logic.

Slides:



Advertisements
Similar presentations
Synchronous Counters with SSI Gates
Advertisements

IN2305-II Embedded Programming Lecture 2: Digital Logic.
Counters Chapter 17 Subject: Digital System Year: 2009.
Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 10.1 Sequential Logic  Introduction  Bistables  Memory Registers  Shift.
Sequential Circuit - Counter -
8.4 Counters NextReturn Any clocked sequential circuit whose state diagram contains a single cycle is called a counter. The number of states in the cycle.
C.S. Choy1 SEQUENTIAL LOGIC A circuit’s output depends on its previous state (condition) in addition to its current inputs The state of the circuit is.
M.S.P.V.L. Polytechnic College, Pavoorchatram
Synchronous Sequential Circuit Design Digital Clock Design.
CS 140L Lecture 4 Professor CK Cheng 10/22/02. 1)F-F 2)Shift register 3)Counter (Asynchronous) 4)Counter (Synchronous)
Sequential Circuit Introduction to Counter
Sequential Circuit  It is a type of logic circuit whose output depends not only on the present value of its input signals but on the past history of its.
Chapter 9 Counters.
Design of Counters ..
CHAPTER 3 Counters.  One of the common requirement in digital circuits/system is counting, both direction (forward and backward)  Digital clocks and.
Synchronous Sequential Circuit Design
Asynchronous Counters
Sequential Circuit - Counter -
Mid3 Revision Prof. Sin-Min Lee. 2 Counters 3 Figure 9--1 A 2-bit asynchronous binary counter. Asynchronous Counter Operation.
CS1104 – Computer Organization Aaron Tan Tuck Choy School of Computing National University.
Counters Dr. Rebhi S. Baraka Logic Design (CSCI 2301) Department of Computer Science Faculty of Information Technology The Islamic University.
Counter Classification Count modulus (MOD) – total number of states in the counter sequence Counter triggering technique – positive edge or negative edge.
CYU / CSIE / Yu-Hua Lee / E- 1 數位邏輯 Digital Fundamentals Chapter 9 Counters.
BZUPAGES.COM1 Chapter 9 Counters. BZUPAGES.COM2 BzuPages.COM Please share your assignments/lectures & Presentation Slides on bzupages which can help your.
Counters - I. Outline  Introduction: Counters  Asynchronous (Ripple) Counters  Asynchronous Counters with MOD number < 2 n  Asynchronous Down Counters.
Counter Circuits and VHDL State Machines
Basic terminology associated with counters Technician Series
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
1 Lecture #13 EGR 277 – Digital Logic Sequential Counters Counters are an important class of sequential circuits. Counters follow a predetermined sequence.
Counters and registers Eng.Maha Alqubali. Registers Registers are groups of flip-flops, where each flip- flop is capable of storing one bit of information.
Lecture No. 29 Sequential Logic.
Lecture No. 23 Sequential Logic. Digital Logic & Design Dr. Waseem Ikram Lecture No. 23.
Memory Elements. Outline  Introduction  Memory elements.
Chapter 35 Sequential Logic Circuits. Objectives After completing this chapter, you will be able to: –Describe the function of a flip-flop –Identify the.
Digital Logic & Design Dr. Waseem Ikram Lecture No. 26.
Sequential logic circuits First Class 1Dr. AMMAR ABDUL-HAMED KHADER.
Date: 01/12/2014 Asynchronous (Ripple) Counters Patel Siddhi P rd SEM Computer Science and Engneering B.M.C.E.T Subject Name: Digital Electronics.
CS1104 – Computer Organization Aaron Tan Tuck Choy School of Computing National University.
Digital Logic & Design Dr. Waseem Ikram Lecture No. 25.
LATCHED, FLIP-FLOPS,AND TIMERS
EKT 124 / 3 DIGITAL ELEKTRONIC 1
Introduction to Advanced Digital Design (14 Marks)
Asynchronous Counters with SSI Gates
Digital Logic & Design Dr. Waseem Ikram Lecture No. 28.
EKT 221 – Counters.
Asynchronous Counters
Sequential Logic Counters and Registers
FIGURE 5.1 Block diagram of sequential circuit
Sequential Circuit: Counter
DR S. & S.S. GHANDHY ENGINEENRING COLLEGE
Asynchronous Counters
Digital Logic & Design Dr. Waseem Ikram Lecture No. 30.
Sequential Circuit - Counter -
D Flip-Flop.
Introduction to Sequential Logic Design
Elec 2607 Digital Switching Circuits
Asynchronous Counters with SSI Gates
Digital Logic & Design Dr. Waseem Ikram Lecture No. 34.
Counters and Registers
Asynchronous Counters 2
Lecture No. 24 Sequential Logic.
CS341 Digital Logic and Computer Organization F2003
Digital Logic & Design Dr. Waseem Ikram Lecture No. 31.
Digital Logic & Design Dr. Waseem Ikram Lecture No. 16.
EET107/3 DIGITAL ELECTRONICS 1
CHAPTER 4 COUNTER.
CHAPTER 4 COUNTER.
Lecture No. 32 Sequential Logic.
CHAPTER 4 COUNTER.
CMPE212 Discussion 11/21/2014 Patrick Sykes
Presentation transcript:

Lecture No. 27 Sequential Logic

Recap 555 Monostable, Astable Timing problems (hold time) Clock Skew (clock delay) Race Conditions

Recap Asynchronous Counters Mod-n Counters Decade Counter Propagation delay Propagation Delay at high frequency Mod-n Counters Decade Counter Integrated Circuit 74LS93A counter MOD-16 and Decade Counters MOD-50 Counter

Asynchronous Counters Down Counters (fig 1) Down Counter with truncated sequence (fig 2)

Synchronous Counters Synchronous Counter (fig 3) 3-bit counter (fig 4) 4-bit counter (fig 5) Synchronous Decade Counter (tab 1 fig 6)