CPE 232 Computer Organization Introduction Dr. Gheith Abandah [Adapted from the slides of Professor Mary Irwin (www.cse.psu.edu/~mji) which in turn Adapted from Computer Organization and Design, Patterson & Hennessy, © 2005, UCB]

Grading Information Grading Policies Midterm Exam 30% Second Exam 10% Home works and Quizzes 10% Final Exam 50% Policies Attendance is required All submitted work must be yours Cheating will not be tolerated This course requires significant effort Note: evening midterm exam

Course Content Midterm Exam Second Exam Final Exam Introduction MIPS Instruction Set Computer Arithmetic CPU Performance Midterm Exam Datapath Design Control Design Pipelining Second Exam Memory Hierarchy Final Exam

Where is the Market? Millions of Computers For “definitions” of desktop, servers, supercomputers (100’s to 1000’s of processors, Gbytes to Tbytes of main memory, Tbytes to Pbytes of secondary storage), and embedded systems (cell phones, automobile control, video games, entertainment systems (digital TVs), PDAs, etc.). The computer (IT) industry is responsible for almost 10% of the GNP of the US. The embedded market has shown the strongest growth (40% compounded annual growth compared to only 9% for desktops – where do laptops fit?). This chart/number does not include the low-end 8-bit and 16-bit embedded processors that are everywhere! This is a good slide to talk about the other performance metrics in addition to speed (or see if the students can come up with them) including Power, space/volume, memory space, cost, reliability

By the architecture of a system, I mean the complete and detailed specification of the user interface. … As Blaauw has said, “Where architecture tells what happens, implementation tells how it is made to happen.” The Mythical Man-Month, Brooks, pg 45

Instruction Set Architecture (ISA) ISA: An abstract interface between the hardware and the lowest level software of a machine that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, I/O, and so on. “... the attributes of a [computing] system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls, the logic design, and the physical implementation.” – Amdahl, Blaauw, and Brooks, 1964 Enables implementations of varying cost and performance to run identical software ABI (application binary interface): The user portion of the instruction set plus the operating system interfaces used by application programmers. Defines a standard for binary portability across computers.

ISA Type Sales Millions of Processor Only includes 32- and 64-bit processors Others includes Samsung, HP, AMD, TI, Transmeta (same ISA as IA-32), … PowerPoint “comic” bar chart with approximate values (see text for correct values)

Moore’s Law In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would double every 18 to 24 months (i.e., grow exponentially with time). Amazingly visionary – million transistor/chip barrier was crossed in the 1980’s. 2300 transistors, 1 MHz clock (Intel 4004) - 1971 16 Million transistors (Ultra Sparc III) 42 Million transistors, 2 GHz clock (Intel Xeon) – 2001 55 Million transistors, 3 GHz, 130nm technology, 250mm2 die (Intel Pentium 4) - 2004 140 Million transistor (HP PA-8500) Tbyte = 2^40 bytes (or 10^12 bytes) Note that Moore’s law is not about speed predictions but about chip complexity

Processor Performance Increase Intel Pentium 4/3000 DEC Alpha 21264A/667 DEC Alpha 21264/600 Intel Xeon/2000 DEC Alpha 5/500 DEC Alpha 4/266 DEC Alpha 5/300 DEC AXP/500 IBM POWER 100 HP 9000/750 IBM RS6000 Another powerpoint “comic” – note that the y axis is log ! x/y where x is the model number and y is the speed in MHz Rate of performance improvement has been between 1.5 and 1.6 times per year – how much longer will Moore’s Law hold? MIPS M2000 SUN-4/260 MIPS M/120

DRAM Capacity Growth 512M 256M 128M 64M 16M 4M 1M 256K 64K 16K Memories have quadrupled capacity every 3 years (up until 1996) – a 60% increse per year for 20 years. Now is doubling in capacity every two years. 16K

Impacts of Advancing Technology Processor logic capacity: increases about 30% per year performance: 2x every 1.5 years Memory DRAM capacity: 4x every 3 years, now 2x every 2 years memory speed: 1.5x every 10 years cost per bit: decreases about 25% per year Disk capacity: increases about 60% per year ClockCycle = 1/ClockRate 500 MHz ClockRate = 2 nsec ClockCycle 1 GHz ClockRate = 1 nsec ClockCycle 4 GHz ClockRate = 250 psec ClockCycle For lecture

Example Machine Organization Workstation design target 25% of cost on processor 25% of cost on memory (minimum memory size) Rest on I/O devices, power supplies, box Computer CPU Memory Devices Control Input That is, any computer, no matter how primitive or advance, can be divided into five parts: 1. The input devices bring the data from the outside world into the computer. 2. These data are kept in the computer’s memory until ... 3. The datapath request and process them. 4. The operation of the datapath is controlled by the computer’s controller. All the work done by the computer will NOT do us any good unless we can get the data back to the outside world. 5. Getting the data back to the outside world is the job of the output devices. The most COMMON way to connect these 5 components together is to use a network of busses. Datapath Output

PC Motherboard Closeup Processor chip is hidden under the heat sink DRAM memories are on DIMMS (dual in-line memory modules)

Inside the Pentium 4 Processor Chip