9th Workshop on Electronics for LHC Experiments.

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Presentation transcript:

9th Workshop on Electronics for LHC Experiments. Amsterdam. September 29th - October 3rd, 2003 "Overview of the Read-Out System for the CMS Drift Tube Chambers." Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Http://wwwae.ciemat.es/cms/DTE/Welcome.html

RO Electronics of the CMS Detector Drift Tube Chambers 2 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 RO Electronics of the CMS Detector Drift Tube Chambers It is part of the electronics of the DT chambers of CMS muon detector: (Readout + Trigger). The aim is the time digitalization and data transmission to DAQ of the incoming signals from the Front-End electronics of the chambers. The first two levels of this data acquisition system are being developed at CIEMAT (Madrid, SPAIN): Read Out Server boards (ROS) 30 m. LVDS copper link Towers Read Out Boards (ROB) DT chamber DDU USC55 Control Room CMS DETECTOR 100 m. Optical link

ROB READ-OUT BOARDS

Location in the CMS detector 4 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 Location in the CMS detector 1 Superlayer Φ 1 Superlayer θ Honeycomb MINICRATE ROB

ROB Time Digitalization 5 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROB Time Digitalization Vdrift ~ cte Tmax drift time~400 ns >> Tbunch crossing 25 ns 1 2 3 4  Overlapping t  x 2 3 1 4 Bunch crossing Drift Time L1 Accept Latency Trigger Time measurement with respect to L1 Accept

ENVIRONMENTAL RADIATION 6 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROB DESIGN PARAMETERS RATES 40.08 MHz clock 10-34 cm-2s-1 luminosity, at 25 ns bunch crossing. 10 Hz/cm-2 charged particles rate. L1 Accept reduces to 1 Hz/cm2 of muons => ~1 KHz/DT chamber cell. 250 DT-chambers, a total of 172,200 anode channels. Overlapping triggers due to a drift time of ~450 ns. Trigger latency of 3.2 s. 100 KHz triggers neutron fluence 10 years < 1010cm-2 charged particles flux < 10 cm-2s-1 10 year integrated dose ~ 1 Gy ENVIRONMENTAL RADIATION Radiation hard devices are not going to be employed, radiation tests have to be performed to every component. OTHERS Stray magnetic fields, in the barrel region around 0.08 Teslas. Limited maintenance for 10 years of operation.

HPTDC (High Performance Time to Digital Converter) 7 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 HPTDC (High Performance Time to Digital Converter) Developed by the CERN/EP-MIC group, and produced by IBM in 0.25 m CMOS technology.  4 registers/channel before L1 buffer.  4 L1 buffers of 256 words, each shared by 8 channels.  Triggers stored in 16 words deep FIFO.  256 words deep readout FIFO.

HPTDC features LHC clock operation (40.08MHz). “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 HPTDC features LHC clock operation (40.08MHz). Highly programmable which provides flexibility. High integration, 32 channels per chip. Overlapping trigger handling. Trigger latencies (50 μs) large enough to accommodate our requirements (3.2μs). Time resolution of ~265 ps RMS in low resolution mode (Required resolution~1ns) Implemented in a radiation tolerant technology, up to levels of 30 Krad total dose with slight increase in power consumption. Up to 2MHz hit rates, much more than our needs (noisy channels ~ tens of KHz). Up to 1 MHz trigger rates, enough for 100 KHz maximum estimated. Bunch and event identification. JTAG port for programming and monitoring. Flexible read-out interface: parallel, serial or byte-wise. Error flags signalling lost of events, TDC internal errors, etc. and self-bypass on error.

Compromise between #boards and #unused channels. 9 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROB ARCHITECTURE READOUT INTERFACE DIAGRAM 4 HPTDC/ROB Compromise between #boards and #unused channels.  Clock synchronous token ring passing scheme where one TDC is configured as Master.  Bypass on error mechanism implemented.  An Altera FPGA manages the data_ready/get_data transmission protocol, slowing down the readout frequency to 20 MHz. parity) Serializer clock JTAG INTERFACE DIAGRAM

10 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 OTHER ROB FEATURES Power consumption: 2.5 V (0.5A) and 3.3V (0.5A) ~ 4 W. Power supply protection circuitry: In case of 2.5V current consumption over 1.5 A or 3.3V over 1A, power supply is disconnected, with powering on cycles every 700 ms (reduces to 10% power consumption). Sensor on board for temperature, 2.5V and 3.3V voltage and 2.5 V current monitoring. (Maxim DS2438). 32 bits/HPTDC word Master header and trailer Error signaling Timing and positional information (# TDC and # channel). Byte-wise readout (8 bits data+1 parity+2 byte ID) DS92LV1021 serializer (12 bits: 10 data + 2 start/stop) at 20 MHz.

ALTERA CPLD CONTROLLER 11 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ALTERA CPLD CONTROLLER Master of the Data_Ready/Get_Data protocol slowing down readout to 20 MHz. Manages the channels enabling mechanism for testing chambers during spill interleaves, simulating artificial tracks. Triple redundancy registers have been implemented (solves 1 bit upsets) and a single event upset counter for radiation tests. LVDS pair for ROB-ROS link LVDS clock signal ROBUS (RO-MC control bus) 128 LVDS signals from DT chambers channels (They are also retransmitted to trigger logic) Independent powering up signals (up to 7 ROB´s) ROB address lines JTAG lines other control lines (test pulses...)

ROB VALIDATION TESTS Time resolution: ~ 265 ps 12 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROB VALIDATION TESTS Time resolution: ~ 265 ps Neighbour channels crosstalk: Below half HPTDC bin resolution < ±0.35 ns Irradiation tests at the Cyclotron Research Centre (UCL): 5·1010 p.cm-2 of 60 MeV protons. SEU: MTBFHPTDC = 3.8 days in the whole detector MTBFALTERA = 3.4 days in the whole detector Test beams at Gamma Irradiation Facility (CERN): Oct. 01: test beam at GIF. Including a 25 ns structured beam May. 03: One full Minicrate operational. No errors found. TDC can stand high hit rates, including noisy channels (~MHz) and this only affects 1 group of 8 channels. Temperature cycling: Regulators (< 5mV/30ºC). 2.5 V current variations 0.4 mA/ºC. Time shift: 900ps/70ºC (14ps/ºC). Max variation ~40 ps/ºC. (30% due to LVDS-TTL receptors). Lifetime test: ROB fully operational at 105ºC ambient temperature for 4 months (3100 hours).

MINICRATE MINICRATE 250 Minicrates 1500 ROB´s: -1440 Rob-128 13 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 MINICRATE 250 Minicrates 1500 ROB´s: -1440 Rob-128 -60 ROB-32 MB1 MB2 MB3 MB4 Power supply 3.3V @ 40A 5V @ 1.5A to ROS MINICRATE TRB TRB TRB SB Chamber signals Link board RO- Link board ROBUS ROB ROB CCB ROB 40 MHz CLOCK RO-link TTC+Slow control

ROS READ-OUT SERVER

ROS Architecture 25 CHANNELS 1 wheel sector Memory FPGA ...... X 4 15 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROS Architecture Memory Token ring Equalizer CLC014AJE Deserializer DS92LV1212A FIFO IDT72V243 FPGA ...... X 4 CPLD Equalizer Deserializer FIFO # event 25 CHANNELS 1 wheel sector ...... ...... X 7 GOL Equalizer Deserializer FIFO Optical Transmitter ...... X 4 CPLD Equalizer Deserializer FIFO

16 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROS description 9U board located inside racks in towers of the CMS detector. Its task is the multiplexation of the data coming from the ROB´s of one whole sector of each wheel. TOTAL:60 ROS: 12 ROS/wheel 25 channels/ROS it also accepts trigger data from the backplane for testing and synchronisation purposes. It also has a power supply protection circuit. A pooling is done by a CPLD every 4 links to align events and fasten transmission. A token ring connects all CPLD´s for data flow to optical link management. ROB data format is modified to include additional information like ROB number and ROB/ROS link status (transmission errors and unlocks). 1MB memory for testing and data flow snapshots for traceability in case of TX errors. ROB-ROS link: 30m copper AC coupled LVDS link RJ-45 cable from ROB´s. Link bandwidth: 240 Mbps. Throughput: 16Mbps. Measured BER < 10-15 ROS-DDU link: 100m optical link to DDU in USC55 control room. GOL: 8B/10B Ethernet Slow (800 Mbps max. Bandwidth) 850 nm VCSEL Honeywell HFE419x-521 on 62.5/125 m multimode fiber LC conectorized. Link max. Bandwidth: 800Mbps. Throughtput: 270Mbps.

ROS-8 Prototype 6U VME board • 16Kbytes FIFO per channel. 17 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROS-8 Prototype 6U VME board • 16Kbytes FIFO per channel. • 1Mword deep memory. • Data accessible from VME, stored on memory or transmitted through 800Mbps copper link.

18 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 ROS-8 Validation Tests Irradiation tests at the Cyclotron Research Centre (UCL): 5·1010 p.cm-2 of 60 MeV protons. SEU: MTBFFIFO = 2.3 days in the whole detector MTBFEQUALIZ = 17.2 days in the whole detector MTBFDESERIALIZER = 10.6 days in the whole detector May 2003 Test beam at Gamma Irradiation Facility (CERN): 1 ROS-8 operated in VME mode connected to 1 Minicrate. No errors found.

19 “Overview of the Read-Out System for the CMS Drift Tube Chambers.” Fernández-Bedoya C., Marín J., Oller J.C., Willmott C. Amsterdam. September 29th - October 3rd , 2003 9th Workshop on Electronics for LHC Experiments. October 2nd, 2003 Conclusions The final architecture of the read-out system for the CMS drift tube chambers is presented. It consists on two types of boards: ROB: for time digitalization ROS: for merging data from ROB´s and transmitting to DDU. The chosen architecture fulfil the experiment requirements of trigger and hit rate, radiation tolerance, limited maintenance and power consumption among others.