555 Timer EEE DEPARTMENT KUMPAVAT HARPAL(130560108002) PATEL RAGHAV(130560108006) GANDHI VIVEK(130560108001)

Oscillators We have looked at simple oscillator designs using an inverter, and had a brief look at crystal oscillators. In this presentation, we introduce the 555 timer; a versatile device that is easier to calculate, design and configure in a variety of ways.

A Versatile Device The 555 Timer is one of the best known IC’s. The 555 is part of every experimenter's tool kit Capable of creating a wide variety of circuits, including: Oscillators with adjustable frequency and Duty Cycle Monostable Multivibrators Analog to digital Converters Frequency Meters Many other applications…. The clock on the Vulcan Board is generated by a 555 timer.

555 Timer Configurations In this course we will use the 555 timer in 2 modes: Astable With some calculations, we can determine the values of the capacitor and the 2 resistors (Ra and Rb) for astable operations. Monostable We can determine the value of the resistor and the capacitor with a simple formula for one-shot operations. There are many other configurations and applications for this device.

555 Layout 1 8 2 7 3 6 4 5 Also available: Ground Trigger Output Reset Vcc Discharge Threshold Control Also available: 556 (two-555’s in one DIP package) 555 in a “metal can” configuration 1 2 3 4 5 6 7 8 Ground Trigger Output Reset Vcc Discharge Threshold Control

Astable Multivibrator Operation of the 555 Timer

Oscillator Configuration Externally, the 555 requires an RC circuit to create the time delays required for the time high and the time low. Standard configuration requires common capacitor a resistor for the charge cycle a resistor for the discharge cycle

General Configuration Basic connections: Ground Vcc Note: some 555 timers may function at voltages other than 5 volts. Reset (active low) Output 1 2 3 4 8 7 6 5 Ground Trigger Output Reset Vcc Discharge Threshold Control

General Configuration Specialized connections: Trigger monitors low voltage Threshold monitors high voltage Discharge path to ground, to discharge the capacitor Control specialized input filtering special applications 1 2 3 4 8 7 6 5 Ground Trigger Output Reset Vcc Discharge Threshold Control

Astable Configuration #1 (“Standard” Configuration) Vcc Vcc Vcc Ra Discharge 1 2 3 4 8 7 6 5 Ground Rb Output Threshold Reset Trigger Control C

Note: Duty Cycle must be > 50% Astable Calculated Values Filter Cap 0.01μF Note: Duty Cycle must be > 50%

Astable Configuration #1 (“Standard” Configuration) Minimum duty cycle > 50%

Calculations: Astable Time High, Time Low Set TH TL Notes: The value 0.693 is a factor associated with the charge/discharge cycle of the 555 timer. Duty Cycle must be > 50%

Sample Calculation Time High, Time Low Set Design an oscillator with a frequency of 200Hz with a duty cycle of 78%. Determine Period (T): Determine TH and TL:

Sample Calculation Time High, Time Low Set Since there are 2 variables in the TL equation, select C: Determine RB by using the TL equation: C=10μF

Sample Calculation Time High, Time Low Set Determine the value for RA:

Calculations: Astable Frequency, Duty Cycle Set Notes: The value 0.693 is a factor associated with the charge/discharge cycle of the 555 timer. Duty Cycle must be > 50%

Frequency, Duty Cycle Set Sample Design Frequency, Duty Cycle Set Build an oscillator using a 555 timer with a frequency of 72kHz at 75% D.C. Use a 100F capacitor.

Frequency, Duty Cycle Set Design Solution Frequency, Duty Cycle Set 1- Determine the ratio of the resistors Ra and Rb: 2- Use the ratio in the frequency equation (substitution):

Frequency, Duty Cycle Set Design Solution Frequency, Duty Cycle Set 3- Solve for Rb: 4-Solve for Ra: 5-Use standard values (optional step): Ra=100k Rb=47k

Frequency, Duty Cycle Set Design Solution Frequency, Duty Cycle Set 6- Calculate actual frequency and DC:

Frequency, Duty Cycle Set Design Solution Frequency, Duty Cycle Set 7- Create the circuit diagram using EWB: 555 Timer, 74.2kHz @ 75.7% D.C.

Minimum Value for Ra The discharge transistor causes the capacitor to discharge to ground. Ra must have a minimum value of 25 to prevent a short circuit of the power supply through the discharge transistor. Minimum Value

In-Class Practice Problem Design an oscillator with a frequency of 500Hz and a duty cycle of 80%. Use a 10μF Capacitor. Calculate using each of the equation sets.

Other Astable Configurations

Astable Configuration#2 Rb must be < .5 Ra

Astable Configuration #3

555 Timer Operation

Internal Operation of the 555 Timer Understanding the internal operation of the 555 timer is important The device combines various circuit theories. Various aspects provide a preview of other circuits, such as the Analog to Digital decoders. Understanding its internal function makes it easier to create new designs with the device.

Comparator The comparator is an operational amplifier (op-amp) configuration. The comparator compares 2 analog voltages and provides a digital output. + - If V+ > V-, the output is a digital 1 If V- > V+, the output is a digital 0

Reference and Comparators The Comparators provide digital logic to an SR Latch A 3-resistor voltage divider provides reference voltages Comparators compare voltage levels. If “+” is higher, output = 1 If “-” is higher, output = 0

Reference and Comparators Pin 6: “Threshold” connection (high Comparator) Pin 8: Vcc connection Pin 5: “Control” connection, used with filter cap. Pin 2: “Trigger” connection (low Comparator) Pin 1: Gnd connection

Latch and Output The Q’ output controls the transistor (“on” or “off”). The transistor acts like a switch. The SR Latch holds its output states The reset input can be used to enable or disable the timer. The buffer has important electrical functions.

Latch and Output Pin 7: “Discharge” connection Pin 4: Reset connection (active low reset) Pin 3: Digital Output

Charge Animation Discharge Animation

What is a disadvantage of the 555 as a timing device? Specification sheet From the specification sheet for the LM555, determine the following: Operational voltage range Maximum current output for each state Frequency Range Output rise and fall time What is a disadvantage of the 555 as a timing device?

Function of the Control Input (Pin5) Pin 5 is the control voltage connection, and is used to access the 2/3 Vcc point of the voltage divider. Normally, a 0.01F capacitor is connected to ground to provide output voltage stability. Used as an input for some applications. AC to pulse modulation voltage controlled oscillator

Design Exercises

Design Exercises Using a 555 timer, design an oscillator with an output of 6Hz with a duty cycle of 60%. Use a 100μF capacitor. Build in EWB. Using a 555 timer, design an oscillator with an output of 10KHz with a duty cycle of 50%. Use a 3.3μF Capacitor. Build in EWB.

Animated Slides The following slides contain animations to demonstrate the operations of: 555 as an astable: charge cycle 555 as an astable: discharge cycle

Capacitor Charges via Ra and Rb Latch in a set state + < - - < + 1 + > - 1 1 1 - > + Vc Capacitor Charges via Ra and Rb Latch in a set state Q’ is low; Q output is high Capacitor continues to charge Lower comparator provides logic low. Latch in hold state. Upper comparator + input is greater than 2/3 Vcc reference Latch receives a reset state Q’ is high; Q output is low Transistor is “on” and a connection to ground is made. Capacitor begins to discharge Animated charge cycle

Capacitor is discharging. Q output is low. - > + - < + 1 1 1 + > - 1 + < - Vc Capacitor is discharging. Q output is low. Upper comparator + voltage less than reference voltage. Latch in a hold state. Lower comparator + voltage is greater than – voltage. Latch is set. Q’ is low. Q output is high. Transistor is “off”. Capacitor begins to charge. Animated discharge cycle

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