EMBEDDED SYSTEMS Unit 3

TIMERS

Basics

Timer_A block diagram

TACTL, Timer_A Control Register

TACCTLx, Timer_A Capture/ Compare Control Register

Output Modes

Output mode Up mode Continuous mode Up/Down mode 1: Set 2: Toggle/Reset 3: Set/Reset 4: Toggle 5: Reset 6: Toggle/Set 7: Reset/Set

Output (mode 0): In which output is controlled directly by the OUT bit in TACCTLn Toggle (mode 4): Provides a simple way of switching a load on and off for equal times (50% duty cycle) Set (mode 1) and Reset (mode 5): Typically used for single changes in the output, usually in the Continuous mode. Reset/Set (mode 7) and Set/Reset (mode 3): Typically used for periodic, edge aligned PWM in Up mode of the counter Toggle/Reset (mode 2) and Toggle/Set (mode 6): Typically used for center-aligned PWM in Up/Down mode

Edge-Aligned PWM

Center-Aligned PWM

MSP430xFxx Operates in 2 modes 32 bit counter Calendar mode The clock needs a 1 Hz input, which it takes from Basic Timer1

RTCCTL RTCYEAR = RTCYEARH:RTCYEARL RTCTIM0 = RTCMIN:RTCSEC. The maximum interval is 2^32 s, which is over 100 years.

Analog Interfacing and data acquisition Comparator: Simple and cheap module that cannot perform a conversion by itself but is usually used with Timer_A to measure the time constant of an external RC circuit. There are two versions, Comparator_A and Comparator_A+. Successive-approximation ADC: The general-purpose type of ADC for many years. It is fast and relatively straightforward to understand. There are two versions, ADC10 and ADC12, which give 10 and 12 bits of output. Sigma–delta ADC: A more complicated ADC that works in a quite different way to give higher resolution (more bits) but at a slower speed. There are two versions, SD16 and SD16_A, both of which give a 16-bit output.

COMPARATOR _A+

CACTL1

CACTL2

CAPD, Comparator_A+, Port Disable Register

ADC

ADC10CTL0

ADC10CTL1

DMA Peripherals use less current than the CPU; The objective of DMA is to move functionality from the CPU to peripherals because: Peripherals use less current than the CPU; Performing operations directly between peripherals allows the CPU to shut down, saving system power; “Intelligent” peripherals are the most capable, providing more opportunity for CPU shutoff; DMA can be enabled for repetitive data handling, increasing the throughput of peripheral modules; Minimal software requirements and CPU cycles.

DMACTL0, DMA Control Register 0 DMAxCTL, DMA Channel x Control Register DMAxSA DMAxSZ DMAxDA DMAIV

CASE STUDY Remote Controller of Air Conditioner Using MSP430

Hardware Structure

Software Structure

Infrared Signal Generation There are several kinds of infrared modulation protocols in the industry Pulse Distance Protocol, Bit Encoding Pulse Distance Protocol, Data Frame Format

Pulse Distance Protocol, TA1 in Envelope Generation

Pulse Distance Protocol, TA0 in Carrier Generation