Beam-Synchronous Data Acquisition (BS-DAQ)

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Presentation transcript:

Beam-Synchronous Data Acquisition (BS-DAQ) at SwissFEL injector facility

BS-DAQ, what is the problem? Pulsed machines such as SwissFEL test injector, run at high rep rates test injector machine is a mix of 100Hz and 10 Hz subsystems SwissFEL machine will be at 100Hz Data generated at separated IOCs distributed over the facility IOCs communicate via Ethernet-based protocol Pulse-to-pulse Data Acquisition, requires real-time behavior non-deterministic communication (e.g. CA) cannot be tolerated Data-to-pulse assignment (pulse marking) is essential: allows correlated studies of the machine behavior

BS-DAQ, the solution Collect the acquired data at individual IOCs: local buffering to avoid no-deterministic cross-IOC communication Timing system (MRF event system) plays important role: precise, distributed triggering (when to measure/actuate) reliable, synchronous communication for DAQ controls (62.5 MB/s) Unique pulse ID generation/distribution by the timing system to distinguish pulse-to-pulse data Collected data along with pulse IDs, buffered at IOCs, is retrieved by CA after DAQ completion

BS-DAQ Mechanism IOC EVG IOC_A IOC_B EVR EVR subsystem A subsystem B CA (controls net) command Master Timing: central point of BS-DAQ controls Client, after DAQ: retrieve data analyze Events + sync data IOC_A IOC_B EVR buffer triggers EVR buffer Events help triggering at the right time but not making sure that the acquired data belong to the same pulse also real-time collection by Ethernet is a problem 2. Solve the problem by using and combining sync data feature of the event system select select H/W_1 H/W_3 H/W_2 H/W_4 subsystem A subsystem B CA (controls net)

BS-DAQ terminology PV represents an EPICS channel (data to be acquired) IOC is an EPICS based system (Input Output Controller) slot refers to collection of resources assigned to a user of BS-DAQ BS-DAQ users C slot 0 B slot 2 A slot 1 time IOC_1 IOC_N PV_2 PV_5 PV_1 PV_6 PV_3 PV_4 PV_m …. PV_j Buffer 1 Buffer 2 Buffer n Buffer 1 Buffer 2 Buffer n

BS-DAQ Mechanism PULSE_1 PULSE_2 PULSE_3 IOC_1 PV_1 PV_2 PV_3 IOC_2 IOC_n PV_7 PV_8 PV_9 user defined PV set for a BS-DAQ slot PV_2 PV_6 PV_7 PV_2 PV_6 PV_7 PULSE_1 PULSE_2 PULSE_3 What user gets: What user wants: PV_2 PV_6 PV_7 PV_2 PV_6 PV_7 PV_2 PV_6 PV_7 PULSE_1 PULSE_2 PULSE_3 start start start Pulser RF Diag. Pulser RF Diag. Pulser RF Diag. … … …

BS-DAQ Low-level Config/Controls Several users can perform simultaneous BS-DAQ in dedicated slots Users need to lease BS-DAQ slots and must free them when finished Slot configuration & controls (start/stop, etc.) are totally independent

BS-DAQ Configuration & Controls All done by EPICS standard records and/or mechanisms: compress record as buffering object (waveforms are handled too!) no self-bustled C code whatever.. record scanning on Event at HIGH PRIO No need to know PV of interest ahead of IOC init specify which PV goes to which buffer at runtime Each PV buffer has also a dedicated pulse ID buffer: pulse ID buffering occurs after data is buffered on every pulse can tell us exactly what pulses were missed in a DAQ is a synchronized time reference (with100Hz rate) helps quick, first-level DAQ verification Linux-based PC systems also participate in BS-DAQ PCI-EVR provides access to timing system EPICS IOC runs exactly the same BS-DAQ software

BS-DAQ Usage Generic IOC S/W application package is maintained and installed from a central location does not modify existing IOC S/W only adds to it couple of macros to be specified by IOC responsible Low level config./controls provided through medm Machine experts use Matlab for config./control/retrieval/analysis automated procedure involves: Find and Lease a free slot Locate IOC for each PV of ineterest Find a free buffer for each PV and assign it to the DAQ slot Specify no. DAQs, spacing, defer cycles, etc. Start/stop/resume/abort Retrieve data + pulse ID buffers for each PV Consistency checks / analysis Free the DAQ slot

Thanks!