Clarification on Defining and Calculating Resolution in DACs DAC: Resolution Clarification on Defining and Calculating Resolution in DACs ©prgodin@gmail.com March 2013 Update March 2015

Introduction There is some confusion over the determination of the “Resolution” of Digital-Analog Converters (DAC). This confusion over “Resolution” is quite visible on-line also. Many people have asked for clarification and several different answers can be found. This presentation is mean to help regain some clarity.

Defining Resolution in DACs Part of the confusion over “Resolution” relies on what it defines. Several definitions of “Resolution” have been presented by various sources. Variety of definitions on “Resolution” in DACs, expressed as either a value or a percentage: The number of bits that represent an analog value or digital input word (i.e. an 8-bit DAC has a resolution of 8 bits). The smallest voltage increment of its output corresponding to a 1 LSB input code change. This is the more “standard” definition. The number of different analog output values that can be provided by the DAC. This will include 0 Volts. The voltage change compared to the full scale voltage (%) The voltage change compared to the applied voltage (%) The term “step” is also problematic as it is sometimes used to describe a voltage value and sometimes used to describe a transition between two logic levels.

Perspectives Resolution can therefore be viewed from: The bit width of the input Binary input perspective where there are 2n unique inputs Output perspective where there are 2n unique voltage outputs (counting 0 Volts as a voltage output) Output voltage step perspective where there are 2n – 1 steps or voltage increments as one does not count the starting step (0 Volts). Resolution can therefore be measured in: Width of the binary input Binary moduli Voltage moduli (voltage as a direct result of a binary moduli) Voltage per step

DAC Circuits and VFSO Most DAC circuits provide a full scale voltage output that is less than the applied voltage. The MSB of the binary input represents a voltage that is half of the applied voltage but the MSB is not at exactly the half-way mark for the binary input. Example: 10002 is step 8 and represents half the VFSO but 11112 is step 15 and is one bit less than twice the value of the MSB Viewed from the binary perspective the voltage values that represent the binary input are based on 2n steps but the maximum output (VFSO) is 2n-1 steps.

Calculating DAC with Unknown VFSO If the VFSO is unknown, for instance when predicting the output voltage of a DAC, the calculation is based on one more step than is provided by the binary input. This will affect the scaling of the steps as the VFSO will be one step below the Vapplied. Calculate based on the applied voltage: Vapplied / 2n = Vstep This will equal the step size of the DAC’s output Calculate VFSO: Since there are actually 2n-1 steps, the VFSO will be one step below the Vapplied: VFSO = Vapplied – Vstep (based on a scaling of one more step)

Calculating DAC Output Voltage Steps If the VFSO is known: Output voltage per step is based on 2n-1 steps VFSO / 2n-1 = Vstep If the VFSO is unknown but the Vapplied is known: Output voltage per step is based on one more step: Vapplied / 2n = Vstep

Example: Vapplied Known Determine the voltage resolution of a 2 bit DAC with an applied voltage of 12 Volts. Calculate step voltage size based on one more step: Vstep+1 = Vapplied / 2n = 12V / 4 = 3 Volts/step The VFSO will be VFSO = Vapplied – Vstep +1 = 12V – 3V = 9 Volts Binary 00 Binary 01 Binary 10 Binary 11 6 Volts 3 Volts 0 Volts 9 Volts (VFSO) Note the maximum Vout of the DAC is 1 step below Vapplied

Example: VFSO Known Example: Determine the voltage resolution of a 2 bit DAC with a full scale voltage output of 9 Volts. There are 2n-1 steps: 22-1 = 3 steps The voltage resolution is calculated as VFSO / (2n-1) : 9 V / 3 steps = 3 Volts/step Binary 00 Binary 01 Binary 10 Binary 11 6 Volts 3 Volts 0 Volts 9 Volts (VFSO) Note the maximum Vout of the DAC is 1 step below Vapplied

% resolution = VSTEP / VFSO Percent Resolution As with Resolution there are different perspectives with calculating percent resolution From an electrical (VOUT) perspective, the percent resolution is the percent of voltage change for each input LSB bit change. It is another way of demonstrating the significance of a voltage step compared to the maximum (full scale) voltage. From a binary perspective the percent resolution is also the percent of voltage change for each input LSB change. % resolution = VSTEP / VFSO or % resolution = 1/(2n-1)

Example: Calculating % Resolution with Vapplied Using our previous example of a 2 bit DAC with a Vapplied of 12V: VSTEP = Vapplied / # Steps+1 = Vapplied / 2n = 12V / 4 steps = 3 Volts/step VFSO = Vapplied – VSTEP +1 = 12V – 3V = 9V % Resolution = VSTEP / VFSO = 3 Volts / 9 Volts = 1/3 = 33.3% -or- % Resolution may be calculated in this manner: 1/(2n-1) = 1/3 = 33.3% Each step represents a 33.3% change in voltage Verify: VFSO x %Resolution should equal the Volts per step 9 Volts * 33.3% = 3 Volts/step

Example: Calculating % Resolution with VFSO Using our previous example of a 2 bit DAC with a VFSO of 9V: VSTEP = VFSO / # Steps = VFSO / (2n-1) = 9V / 3 steps = 3 Volts/step % Resolution = VSTEP / VFSO = 3 Volts / 9 Volts = 1/3 = 33.3% -or- % Resolution may also be calculated in this manner: 1/(2n-1) = 1/3 = 33.3% Each step represents a 33.3% change in voltage Verify: VFSO x %Resolution should equal the Volts per step 9 Volts * 33.3% = 3 Volts/step

Calculating % Resolution with Binary Percent resolution is simply calculated this way: % Resolution = 1/(2n-1) = 1/3 = 33.3% Each step represents a 33.3% change in voltage Verify: VFSO x %Resolution should equal the Volts per step 9 Volts * 33.3% = 3 Volts/step

Another Perspective….. (because it wasn’t complicated enough) Some may state that the percent resolution should be based on the applied voltage and not the full scale voltage output of the DAC. In this case the values will be different. % Resolution = Vapplied / VSTEP or % Resolution = 1/2N Example: A 2-bit DAC with a Vapplied of 12V: % Resolution = 3V/12V = 25% 1/4 = 25%

Sample Calculations The following slides demonstrate that there are two methods for calculating voltage resolution (voltage per LSB) Vapplied and VFSO Both methods work. It depends on what value is available (Vapplied or VFSO) EWB was used to demonstrate how the two calculations and the electronic simulation all agree.

EWB Values for 8-bit DAC

Calculation vs Measurement DAC model with 8-bit input Vapplied 8-bit DAC calculation with known Vapplied # steps (Vapplied) = 2n = 28 = 256 steps (to Vapplied) (Note the number of steps used in the calculation is one more than the actual output steps) VSTEP = Vapplied / # Steps = 5V / 256 steps = 19.53mV per step Measured in EWB: 19.53 mV per step Measured in EWB: VFSO = 4.98V VFSO Note the VFSO for all 1’s input is 4.98 Volts, not 5 Volts, because it is one step below the applied voltage. If we calculate with the VFSO of 4.98 Volts: 4.98 V / 255 steps (not 256) = 19.53mV per step, as measured.

EWB Values for 4-bit DAC

Calculation vs Measurement DAC model with 4-bit input Vapplied 4-bit DAC calculation with Vapplied # Steps (Vapplied) = 2n = 24 = 16 steps (Vapplied) (Note the number of steps used in the calculation is one more than the actual output steps) VFSO For this DAC’s configuration the maximum output is based on an input of 1111 0000. The anticipated VFSO needs to be calculated: 1111 0000 = 240th step (240 / 256) * 5V = 4.6875 Volts = VFSO (Note this takes into account one more step than the actual output steps, and the fact that this DAC will provide a maximum voltage that is one step below the applied voltage) VSTEP = VFSO / #Steps = VFSO /(2n-1) = 4.6875 V / 15 steps = 312.5mV/step

Conclusion There are various perspectives as to what “resolution” means in reference to DACs and this can be confusing. When it comes to the output voltage resolution, the calculation selected is based on the known voltages: In the case of known VFSO the number of steps is 2n -1 because the first step (the reference for all other steps) is not counted. In the case of known Vapplied , for most DACs the number of steps is 2n because the scaling of the steps is based on one more step, but that last step will not be attained by the DAC. The VFSO is calculated as the applied voltage minus one step. END