Photon Counting - Biomedical Imaging

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Presentation transcript:

Photon Counting - Biomedical Imaging Team Members: Ben Jenkins Bassem Faour Advisor: Jesse Wilson

What is it? Detecting the photon released after exciting a sample with a laser http://omlc.org/news/aug98/tr_lifetime.gif

Fluorescence Lifetimes http://www.photonik.uniklinikum-jena.de/en/ukjm/Methods/Fluorescence+lifetime+measurements/TCSPC.html

“Photon counting sounds hard” Yes. http://www.becker-hickl.de/pdf/tcspc1l.pdf

Why are we doing it? We want to do it with $1000 . Olivera gave me $100

Prior research http://iopscience.iop.org/article/10.1088/1748-0221/1/07/P07001/pdf

Current work 0 s 15 ns 1.5us 5 Stages Protecting the FPGA LVDS Timing Data Storage / Transfer Building an image Diode Protection LVDS Timing Data Storage Data Transfer Image 0 s 15 ns 1.5us

The Art of Detecting https://www.thorlabs.hk/images/TabImages/Photomultiplier_Tube_A1-780.jpg https://micro.magnet.fsu.edu/primer/digitalimaging/concepts/images/photomultiplier.jpg

Diode Protection Hard to protect current spikes at such a fast level Current spikes = nanosecond rise-times Discounts Fuses Diodes generally 6V Solution: USB-LC6 Technology used in most USB 2.0 connections Low Voltage Diodes

LVDS Low Voltage Differential Signaling https://www.maximintegrated.com/en/images/appnotes/3662/3662Fig02.gif

LVDS Progress Input Circuit with tested measurements: Vhigh = -36 mV Vlow = -45 mV Vref = -40 mV Meaning: LVDS triggering working properly!

Data Storage Binned Histograms

Timing Goal: 2ns – 10ns Processor = 500MHz = 2ns resolution Decays follow an exponential curve Can be fitted to even just 2 bins with enough data

Tryptophan Glutamine

http://www.boselec.com/products/images/convallaria.jpg

Data transfer Receive Data on the computer and process it using Matlab Sending binned histograms via serial communication UART? Universal Asynchronous Receiver Transmitter Built in USB interface Previous work at Cornell University using the RS232 instead

Current work (again) 0 s 15 ns 1.5us 5 Stages Protecting the FPGA LVDS Timing Data Storage / Transfer Building an image Diode Protection LVDS Timing Data Storage Data Transfer Image 0 s 15 ns 1.5us

Budget Expenses So Far: Altera Dev. Board $700 (Donation) HSMC adapter for LVDS $70 ESD Protector $5 ESD Protector Adapter $5 Team Budget Remaining: $20

Future work Data Storage & Transfer Code Building an image from the data So. Much. Testing. ESD Protection (Lets fry some diodes!) Actual Sample Our Tech vs. Professional Tech

Questions Sample Questions: Are you still alive? I’d like to hire you. How can I contact you? I have this cute friend you’d like.