Walter Katz IBIS-ATM December 8, 2015

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Presentation transcript:

Walter Katz IBIS-ATM December 8, 2015 GND BIRD Walter Katz IBIS-ATM December 8, 2015

Intent of This Presentation I suspect that there will be an IBIS 6.2 which will be strictly limited to cleaning up Ground in IBIS. I put the following together as an introduction to this “BIRD”. I do not know how this would be parsed into the IBIS document, but I wanted to first get an agreement as to the intent of the change, before going through IBIS to actually wordsmith the changes. I propose that we get agreement on this within IBIS-ATM, and then charter an editorial committee to go through IBIS 6.1, make all of the changes, and then submit the edited document to IBIS for approval as IBIS 6.2. 2

IBIS Makes Implicit Assumptions About “Ground” GND, Ground, Reference Node, Node 0, A_gnd and Absolute Ground need careful review and documentation. When IBIS was originally written “Ground” was often interpreted to be truly global, have a value of 0.0 Volts and represented as Node 0 in SPICE simulators. The name GND is actually used in several different contexts in this document. 3

“must not be used” Needs Clarification 3 GENERAL SYNTAX RULES AND GUIDELINES This section contains general syntax rules and guidelines for ASCII .ibs files: 1. The content of the files is case sensitive, except for reserved words and keywords. 2. The following words are reserved words and must not be used for any other purposes in the document: POWER - reserved model name, used with power supply pins GND - reserved model name, used with ground pins NC - reserved model name, used with no-connect pins NA - used where data not available, CIRCUITCALL - used for circuit call references in Section 6.3 GND is used in many places in this document as the signal_name of Pins that have Model Name GND. GND in many “buffer example schematics” use this name GND as a signal name such as VCC, VDD, VSS. The string GND in this document shall refer to either a Model Name in the Pin list or a signal name on one or more pins that coincidently also have Model Name GND. GND shall never be interpreted as the reference node in many SPICE simulators that is often called Node 0. Since IBIS defines signal_name as a component Data Book Name, we must assume that all Pins that have Model Name POWER or GND and have the same_signal name are assumed to be connected together on the components board or module. Each buffer can have one or two ground terminals (pdref and/or gcref) that are local nodes of the of the power distribution circuit of Pins that has Model Name GND. [Pin Mapping] is required to determine which signal_name is the local ground nodes of each Buffer. 4

GND is Often Used in the Context of Signal_name GND in this Case is the Data Book Name [Pin] signal_name model_name R_pin L_pin C_pin | 1 RAS0# Buffer1 200.0m 5.0nH 2.0pF 2 RAS1# Buffer2 209.0m NA 2.5pF 3 EN1# Input1 NA 6.3nH NA 4 A0 3-state 5 D0 I/O1 6 RD# Input2 310.0m 3.0nH 2.0pF 7 WR# Input2 8 A1 I/O2 9 D1 I/O2 10 GND GND 297.0m 6.7nH 3.4pF 11 RDY# Input2 12 GND GND 270.0m 5.3nH 4.0pF | . 18 Vcc3 POWER 19 NC NC 20 Vcc5 POWER 226.0m NA 1.0pF 21 BAD1 Series_switch1 | Illegal assignment 22 BAD2 Series_selector1 | Illegal assignment 5

IV Tables Reference Rail Voltages in Simulation IV tables define the current contribution to the A_signal terminal of an I/O buffer model. The voltage used to control these tables is the voltage between the A_signal node of an I/O buffer and the A_puref, A_pcref, A_pdref, and A_gcref buffer model terminals. This should not be confused with the derivation method used to create the data in the IV tables which refer to GND, Ground, Absolute Ground, or static voltages reference to Test Fixture Ground. The use of the node name GND, the ground symbol ---, or names such as GND_Clamp_Reference, Power_Clamp_Reference, Pullup_Reference, Pulldown_Reference are voltages relative to the Test Fixture Ground. 6

Simulation Netlists SPICE (including AMS language) signal integrity simulations are preformed using netlists of connected interconnect models, power delivery models, I/O buffer models, and simulator dependent control elements. The IBIS organization defines standards for distributing interconnect models and I/O buffer models. Ultimately these models are instantiated in simulation netlists as instances of SPICE or AMS elements that have terminals. Terminals that have the same name are “connected” and have the same voltage potential, and are called a node. The operation of any interconnect model or I/O buffer models is a function of the voltage potential difference between the nodes of the terminals of that model (and the current flowing into the terminal. 7

Simulator Reference Node A simulator may (and usually does) have a concept of a reference node (often referred to as Node 0, Absolute Ground, or GND), the I/O buffer or interconnect elements should not use this node and certainly should not supply current to or draw current from this internal simulator reference node. This node 0 should not be confused with the use of the name GND in this IBIS document. 8

C_comp is Connected to ? IBIS 1.0 says nothing about how to connect C_comp. In many locations in IBIS 6.0 C_comp is connected to GND, GND Symbol, Test Fixture GND, GND_Clamp_Reference, Pulldown_Reference. There has been an implication that therefore simulators should connect C_comp to the simulator reference ground (e.g. Node 0) This implication is incorrect, it is an interpretation based on the text used to derive the IV curves. IBIS 6.2 should explicitly say that C_comp should be connected to the buffer local ground rail. 9