Modeling, Characterization and Design of Wide Bandgap MOSFETs for High Temperature and Power Applications UMCP: Neil Goldsman.

Slides:



Advertisements
Similar presentations
Multisubband Monte Carlo simulations for p-MOSFETs David Esseni DIEGM, University of Udine (Italy) Many thanks to: M.De Michielis, P.Palestri, L.Lucci,
Advertisements

Lecture #5 OUTLINE Intrinsic Fermi level Determination of E F Degenerately doped semiconductor Carrier properties Carrier drift Read: Sections 2.5, 3.1.
Nanostructures Research Group Center for Solid State Electronics Research Quantum corrected full-band Cellular Monte Carlo simulation of AlGaN/GaN HEMTs.
Simulations of sub-100nm strained Si MOSFETs with high- gate stacks
Computational Electronics Generalized Monte Carlo Tool for Investigating Low-Field and High Field Properties of Materials Using Non-parabolic Band Structure.
CHAPTER 3 Introduction to the Quantum Theory of Solids
Carrier Transport Phenomena
Advanced Semiconductor Physics ~ Dr. Jena University of Notre Dame Department of Electrical Engineering SIZE DEPENDENT TRANSPORT IN DOPED NANOWIRES Qin.
ISDRS 2003 Xiaohu Zhang, N.Goldsman, J.B.Bernstein, J.M.McGarrity and S. Powell Dept. of Electrical and Computer Engineering University of Maryland, College.
Mobility Chapter 8 Kimmo Ojanperä S , Postgraduate Course in Electron Physics I.
Modeling, Characterization and Design of Wide Bandgap MOSFETs for High Temperature and Power Applications UMCP: Neil Goldsman Gary Pennington(Ph.D) Stephen.
1/f noise in devices 전광선.
Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 CHAPTER 2 WEEK 7 CHAPTER 2 MOSFETS I-V CHARACTERISTICS CHAPTER 2.
EXAMPLE 6.1 OBJECTIVE Fp = 0.288 V
National Science Foundation Identification of an intrinsic difficulty in fabricating efficient power devices Sokrates T. Pantelides, Vanderbilt University,
Lecture 4 OUTLINE Semiconductor Fundamentals (cont’d)
Neil Goldsman Dept. of Electrical and Computer Engineering
1 Modeling, Characterization and Design of Wide Bandgap MOSFETs for High Temperature and Power Applications UMCP: Neil Goldsman Gary Pennington (Post-Doctoral)*
A Comparison between Electroluminescence Models and Experimental Results D. H. Mills 1*, F. Baudoin 2, G. Chen 1, P. L. Lewin 1 1 University of Southampton,
Modeling, Characterization and Design of Wide Bandgap MOSFETs for High Temperature and Power Applications UMCP: Neil Goldsman Gary Pennington(Ph.D) Stephen.
© 2012 Eric Pop, UIUCECE 340: Semiconductor Electronics ECE 340 Lecture 30 Metal-Semiconductor Contacts Real semiconductor devices and ICs always contain.
Dopant profiling and surface analysis of silicon nanowires using capacitance-voltage measurements Erik C. Garnett, Yu-Chih Tseng, Devesh R. Khanal, Junqiao.
NMOS PMOS. K-Map of NAND gate CMOS Realization of NAND gate.
Influence of carrier mobility and interface trap states on the transfer characteristics of organic thin film transistors. INFM A. Bolognesi, A. Di Carlo.
Development of an analytical mobility model for the simulation of ultra thin SOI MOSFETs. M.Alessandrini, *D.Esseni, C.Fiegna Department of Engineering.
Advanced Drift Diffusion Device Simulator for 6H and 4H-SiC MOSFETs
IEE5328 Nanodevice Transport Theory
Lecture 18 OUTLINE The MOS Capacitor (cont’d) – Effect of oxide charges – V T adjustment – Poly-Si gate depletion effect Reading: Pierret ; Hu.
Scattering Rates for Confined Carriers Dragica Vasileska Professor Arizona State University.
HO #3: ELEN Review MOS TransistorsPage 1S. Saha Long Channel MOS Transistors The theory developed for MOS capacitor (HO #2) can be directly extended.
F. Sacconi, M. Povolotskyi, A. Di Carlo, P. Lugli University of Rome “Tor Vergata”, Rome, Italy M. Städele Infineon Technologies AG, Munich, Germany Full-band.
Norhayati Soin 06 KEEE 4426 WEEK 3/2 20/01/2006 KEEE 4426 VLSI WEEK 4 CHAPTER 1 MOS Capacitors (PART 3) CHAPTER MOS Capacitance.
EE105 - Spring 2007 Microelectronic Devices and Circuits
4H-SIC DMOSFET AND SILICON CARBIDE ACCUMULATION-MODE LATERALLY DIFFUSED MOSFET Archana N- 09MQ /10/2010 PSG COLLEGE OF TECHNOLOGY ME – Power Electronics.
Fowler-Nordheim Tunneling in TiO2 for room temperature operation of the Vertical Metal Insulator Semiconductor Tunneling Transistor (VMISTT) Lit Ho Chong,Kanad.
Compact Power Supplies Based on Heterojunction Switching in Wide Band Gap Semiconductors NC STATE UNIVERSITY UCSB Steady-State and Transient Electron Transport.
林永昌 2011.Dec.04. Experiment Hall-bar geometry was fabricated using oxygen plasma. Electrodes were made of Ti/Pd/Au. Gate length 2 to 4 μm, Hall-bar width.
President UniversityErwin SitompulSDP 3/1 Dr.-Ing. Erwin Sitompul President University Lecture 3 Semiconductor Device Physics
Fatemeh (Samira) Soltani University of Victoria June 11 th
Trap Engineering for device design and reliability modeling in memory/logic application 1/ 년 02 월 xx 일 School of EE, Seoul National University 대표.
CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES Part 1.
Chapter 6 The Field Effect Transistor
Power MOSFET Pranjal Barman.
MOSFET Device Simulation
ACADEMIC AND SCIENTIFIC WORK ROBERTO PINEDA GÓMEZ
Lecture 18 OUTLINE The MOS Capacitor (cont’d) Effect of oxide charges
Conductivity, Energy Bands and Charge Carriers in Semiconductors
Lecture 4 OUTLINE Semiconductor Fundamentals (cont’d)
Recall Last Lecture Common collector Voltage gain and Current gain
“Low Field”  Ohm’s “Law” holds J  σE or vd  μE
Metal Semiconductor Field Effect Transistors
Revision CHAPTER 6.
Modeling Vacancy-Interstitial Clusters and Their Effect on Carrier Transport in Silicon E. Žąsinas, J. Vaitkus, E. Gaubas, Vilnius University Institute.
Integration of DFT, Process and Device Modeling: The Virtual Fab
ECE574 – Lecture 3 Page 1 MA/JT 1/14/03 MOS structure MOS: Metal-oxide-semiconductor –Gate: metal (or polysilicon) –Oxide: silicon dioxide, grown on substrate.
Lecture #5 OUTLINE Intrinsic Fermi level Determination of EF
Lecture 4 OUTLINE Semiconductor Fundamentals (cont’d)
Lecture 19 OUTLINE The MOSFET: Structure and operation
Strained Silicon MOSFET
MOS Capacitor Basics Metal SiO2
Semiconductor Device Physics
Long Channel MOS Transistors
Lecture 18 OUTLINE The MOS Capacitor (cont’d) Effect of oxide charges
Lecture #15 OUTLINE Diode analysis and applications continued
Sung June Kim Chapter 18. NONIDEAL MOS Sung June Kim
Conduction of Electricity in Solids
Semiconductor Physics
Solid State Electronics ECE-1109
Beyond Si MOSFETs Part 1.
Chapter 6 Carrier Transport.
Presentation transcript:

Modeling, Characterization and Design of Wide Bandgap MOSFETs for High Temperature and Power Applications UMCP: Neil Goldsman Gary Pennington (Post-Doctoral)* Siddharth Potbhare (MS-Ph.D)^ ARL: Skip Scozzie Aivars Lelis (& UMCP Ph.D) Bruce Geil (& UMCP MS) Dan Habersat (& Former Merit) Gabriel Lopez (& Former Merit) ARO STAS: Barry Mclean & Jim McGarrity * Partially supported by PEER; ^ Fully supported by PEER

Personnel Development: Contribution to ARL Gary Pennington: Finished PhD 2003, researching SiC for ARL Steve Powell: Finished PhD 2003 Gabriel Lopez: Former MERIT, new ARL employee Aivars Lelis: ARL employee, PhD under Goldsman (transferring our software to ARL for use and more development) Bruce Geil: ARL employee, MS under Goldsman (transferring our software to ARL for use and more development)

Outline Introduction: -Benefits of Wide Bandgap Semiconductors -Difficulties to Overcome Atomic Level Analysis of Carrier Transport in 4H & 6H SiC: -Monte Carlo transport modeling: bulk and surface 4H SiC MOSFETS: -Developing new simulation methods to extract physics &propose how to improve performance. -Effects of High Temperatures & High Voltage -4H MOSFET -Improved numerical attributes

Introduction: Benefits of Wide Bandgap Semiconductors (SiC) Extremely High Temperature Operation Extremely High Voltage Extremely High Power Capable of Growing Oxide => MOSFETs Potential for High Power and High Temperature Control Logic Power IC’s High Temperature IC’s

Drift-Diffusion and Compact Research Strategy Device Modeling Drift-Diffusion and Compact Material Modeling Monte Carlo Experiment SiC Device Research & Design

Advanced Drift Diffusion Device Simulator for 6H and 4H-SiC MOSFETs

Outline Brief introduction to Silicon Carbide Mobility Modeling for 4H-SiC MOSFETs Coulomb Scattering Mobility Model Simulations and Extracted Results Conclusion

MOSFET Device Simulation MOSFET Device Structure Steady State Semiconductor Equations Poisson Equation: Electron current continuity equation: Hole current continuity equation: Electron current equation: Hole current equation:

Mobility Models Low field mobility: High field mobility: Oxide Bulk Electron Flow Electron Surface Phonon Surface Roughness Trap Fixed Charge Matthiessen's rule mLF = Low Field Mobility mB = Bulk Mobility mSP = Surface Phonon Mobility mSR = Surface Roughness mobility mC = Coulomb Scattering Mobility Low field mobility: High Field Mobility: High field mobility:

Coulomb Scattering Rate Screened Coulomb Potential: Screening Wave Vector: Inversion Charge Density: Average depth of the Inversion Layer: Treating Coulomb scattering as a quasi-2D phenomenon, we take a 1D Inverse Fourier Transform of the 3D matrix element to extract its dependence on distance between the mobile carrier and the scattering charge 3D Matrix Element: Quasi-2D Matrix Element:

Coulomb Scattering Rate Quasi-2D Scattering Rate: Electron Scattering Charge z=zi=0 z S D zi Bulk Scattering Charge Distribution For the results shown in this paper, we have assumed that the fixed oxide charge is located at the interface. Coulomb Scattering Mobility: Total Coulomb Mobility at depth z:

Comments on the Coulomb Mobility Model The model is easy to implement in a drift diffusion device simulator as it gives local mobility everywhere inside the device Coulomb mobility is directly proportional to temperature and inversely proportional to the density of scattering charge For a constant scattering charge density, Coulomb mobility will increase with gate voltage due to increased screening Coulomb mobility increases rapidly with distance away from the interface Effect of oxide charges distributed inside the oxide away from the interface is less on determining the scattering of inversion layer charges

4H-SiC MOSFET Simulations and Extracted Results

Room Temperature ID-VGS

Interface Trap Density of States Interface traps Density of States: Probability of occupation of traps: Occupied Interface Trap Density: = 9.51013 cm-2eV-1 = 4.01011 cm-2eV-1 = 0.0515 eV Eneutral = 1.63 eV at Room Temperature

Ninv and Nit Owing to the extremely high density of states of the interface traps, the occupied interface trap density (Nit) is much higher than the inversion charge density (Ninv) at room temperature. As fewer mobile charges are available for conduction, the current is less.

Coulomb Scattering Mobility Coulomb scattering decreases with increasing distance away from the interface. Hence Coulomb mobility rises with increase in depth. With increase in gate voltage, mobile carrier concentration increases leading to increased screening of trapped charges. Hence, the Coulomb mobility curves rise more sharply at higher gate voltages. Increasing Screening To Bulk

Total Low Field Mobility vs. Depth The total mobility increases with depth inside the 4H-SiC MOSFET. At the surface, the total low field mobility is approximately 25 cm2/Vs at room temperature. Surface Mobility 20 cm2/Vs - 30 cm2/Vs To Bulk

Current Density Even though the mobile charge concentration is maximum at the interface, maximum current flows approximately 2nm to 3nm below the interface. This is due to the large amount of scattering taking place at the interface. With increase in gate voltage, the peak of the current density curve shifts towards the interface indicating that . To Bulk

Improving the Interface Reduction in Interface trap density Reduction in surface roughness

ID-VGS at different Temperatures

Nit and Ninv at Different Temperatures

Mobilities at different Temperatures & Gate Voltage

Key Findings & Remarks Room temperature models for different types of mobilities have been devised and implemented for 4H-SiC MOSFETs, and good agreement between simulations and experiment has been achieved. A first principles Coulomb Scattering mobility model has been developed specifically for 4H-SiC MOSFETs Interface trap density of states for 4H-SiC MOSFETs has been estimated Coulomb scattering due to interface trapped charge and surface roughness scattering are the two dominant mobility degradation mechanisms Maximum current flows 2nm – 3nm away from the interface in 4H-SiC MOSFETs Large improvement in current is predicted on reduction of interface trap densities in 4H-SiC MOSFETs Agreement with experiment at higher temperature attained. At higher temperatures, and higher gate voltages, bulk phonon scattering becomes increasingly important.

Roughness Mobility for a 4H-SiC Stepped Surface

Surface Morphology

Epitaxial growth of device-quality 4H-SiC is typically achieved by step-flow growth, with the surface offset from the (0001) plane by ~8o towards the [1120] direction. This creates a stepped morphology along the surface, with microsteps and possibly both macrosteps (facets).

Surface morphology is generated via Monte Carlo methods using experimental observations. Step width distribution indicates meandering, but will use straight steps for now. Random roughness parallel and perpendicular to steps (L, d) Macrosteps Syväjärvi et al. J. Crystal Growth. V 236, p297 (2002) Microsteps (4-2 bunching) Kimoto et al. J. Appl. Phys. V 81, p3494 (1997)

Closer Look at surface morphology: (4-2) Microsteps + Macrosteps (facets) (4-2) Microsteps

Meandering of steps is not included at this point Meandering of steps is not included at this point. This effect increases as the distribution of step widths increases. Microsteps will meander if step bunching occurs. (increase in || roughness) ~6nm micostep ~40nm facet Meandering of microsteps on a facet

Roughness Scattering at 4H-SiC/oxide interface

Experiments indicate that the field-effect mobility of 4H-SiC devices produced by step-flow growth is anisotropic. The mobility perpendicular to the steps (along [1100]) was found to be significantly lower than that parallel to the steps (along [1120]). L. A. Lipkin, M.K. Das, and A. Saxler . ICSCRM (2003) Considering these observations, we investigate the role of surface steps in both the degradation and anisotropy of the surface roughness mobility in off-axis 4H-SiC.

Band structure anisotropy will be include as a later.

For a random correlation length of 2 For a random correlation length of 2.2nm and surface field 100kV/cm,can determine the roughness mobility ratios vs lattice temperature

Carrier relaxation rate due to surface roughness Momentum relaxation rate for carrier with (kx,ky): 1 = e2F2m* ∫ dθ [1-cos(θ)] S(qx,qy) Γ(qx,qy)2 t(kx,ky,F) 2πЋ3 ε(qx,qy)2 S=power spectrum of roughness Γ=image potential correction, set =1 θ = (kxqx + kyqy) |(kxqx + kyqy)| F=surface field (1X105 V/cm used here) ε=ε(F), screening dielectric function

Power Spectrum (4-2) microsteps Facets + (4-2) microsteps Dynamic screening still needs to be included

Mobility with facets and micosteps

Mobility without facets

Effects of Step Bunching No bunching 4-2 bunching Random bunching

Conclusions The presence of the surface steps reduces the mobility of 4H-SiC by a factor of 5-10. With L=2.2nm, mobilities increase approximately linearly with T. 4H-SiC devices operating at high temperatures should have an enhancement of the surface roughness mobility when compared to room temperature operation. Microsteps appear to reduce the anisotropy with increasing temperature whereas faceting appears to have the opposite effect. Step bunching significantly degrades the roughness mobility.

Key Results for Recent 4H SiC Technology Significant improvement in numerical attributes of simulator: Allows for much higher resolution mesh Improved physical model for interface state mobility Depends on 2D coulomb scattering Developing new model for device instability Use gate current injected from channel Related to oxide charging and interface trap generation New Monte Carlo simulations show energy of carriers in channel Needed for interface trap generation Needed for oxide state occupation

Very Recent Publications G. Pennington, and N. Goldsman, "Empirical Pseudopotential Band Structure of 3C, 4H, and 6H SiC Using Transferable Semiempirical Si and C Model Potentials,” Phy. Rev. B, vol 64, pp. 45104-1-10, 2001. G. Pennington, N. Goldsman, C. Scozzie, J. McGarrit, F.B. Mclean., “Investigation of Temperature Effects on Electron Transport in SiC using Unique Full Band Monte Carlo Simulation,” International Semiconductor Device Research Symposium Proceedings, pp. 531-534, 2001. S. Powell, N. Goldsman, C. Scozzie, A. Lelis, J. McGarrity, “Self-Consistent Surface Mobility and Interface Charge Modeling in Conjunction with Experiment of 6H-SiC MOSFETs,” International Semiconductor Device Research Symposium Proceedings, pp. 572-574, 2001. S. Powell, N. Goldsman, J. McGarrity, J. Bernstein, C. Scozzie, A. Lelis, “Characterization and Physics-Based Modeling of 6H-SiC MOSFETs”’ Journal of Applied Physics, V.92, N.7, pp 4053-4061, 2002 S Powell, N. Goldsman, J. McGarrity, A. Lelis, C. Scozzie, F.B McLean., “Interface Effects on Channel Mobility in SiC MOSFETs,” Semiconductor Interface Specialists Conference, 2002 G. Pennington, S. Powell, N. Goldsman, J.McGarrity, A. Lelis, C.Scozzie., “Degradation of Inversion Layer Mobility in 6H-SiC by Interface Charge,” Semiconductor Interface Specialists Conference, 2002.

Very Recent Publications Continued 7) G. Pennington and N. Goldsman, ``Self-Consistent Calculations for n-Type Hexagonal SiC Inversion Layers,” Journal of Applied Physics, Vol. 95, No. 8, pp. 4223-4234, 2004 8) G. Pennington, N. Goldsman, J. McGarrity, A Lelis and C. Scozzie, ``Comparison of 1120 and 0001 Surface Orientation in 4H SiC Inversion Layers,” Semiconductor Interface Specialists Conference, 2003. 9) S. Potbhare, N. Goldsman, A. Lelis, “Characterization and Simulation of Novel 4H SiC MOSFETs”, UMD Research Review Day Poster, March 2004. 10) G. Pennington, N. Goldsman, J. McGarrity, A. Lelis, C. Scozzie, ``(001) Oriented 4H-SiC Quantized Inversion Layers," International Semiconductor Device Research Symposium, pp. 338-339, 2003. X. Zhang, N. Goldsman, J.B. Bernstein, J.M. McGarrity, S. Powell, ``Numerical and Experimental Characterization of 4H-SiC Schottky Diodes,” International Semiconductor Device Research Symposium, pp. 120-121, 2003. S. K. Powell, N. Goldsman, A. Lelis, J. M. McGarrity and F.B. McLean, High Temperature Modeling and Characterization of 6H SiC MOSFETs, Journal of Applied Physics, 2005.

Very Recent Publications Continued 13) S. Potbhare, G. Pennington, N. Goldsman, J.M. McGarrity, A. Lelis, “Characterization of 4H SiC MOSFET Interface Trap Charge Density Using First Principles Coulomb Scattering Mobility Model and Device Simulation,” Proceedings of the International Conference on Simulation of Semiconductor Processing and Devices (SISPAD), pp. 95-98, 2005. 14) S. Potbhare, G. Pennington, N. Goldsman, A. Lelis, D. Habersat, F.B. McLean, J.M. McGarrity, “Using a First Principles Coulomb Scattering Mobility Model for 4H-SiC MOSFET Simulation,” ICSCRM, 2005 (to appear)