ECE 3110: Introduction to Digital Systems

Slides:



Advertisements
Similar presentations
Techniques for Combinational Logic Optimization
Advertisements

Chapter 3 Gate-Level Minimization
Types of Logic Circuits
Logical Systems Synthesis.
ECE 2110: Introduction to Digital Systems Combinational Logic Design Principles.
Chapter 2 Logic Circuits.
ECE 3110: Introduction to Digital Systems
Gate-Level Minimization
ECE 3110: Introduction to Digital Systems Simplifying Sum of Products using Karnaugh Maps.
Chapter 3 Simplification of Switching Functions. Karnaugh Maps (K-Map) A K-Map is a graphical representation of a logic function’s truth table.
Boolean Algebra and Combinational Logic
1 EE 365 Combinational-Circuit Synthesis. 2 Combinational-Circuit Analysis Combinational circuits -- outputs depend only on current inputs (not on history).
Chapter 3 Simplification of Switching Functions
Example: Given a 4-bit input combination N=N 3 N 2 N 1 N 0, this function produces a 1 output for N=1,2,3,5,7,11,13, and 0 otherwise.  According to the.
Chapter 2: Boolean Algebra and Logic Functions
11.1 Boolean Functions. Boolean Algebra An algebra is a set with one or more operations defined on it. A boolean algebra has three main operations, and,
1 Chapter 5 Karnaugh Maps Mei Yang ECG Logic Design 1.
Chapter 3 Simplification of Switching Functions. Simplification Goals Goal -- minimize the cost of realizing a switching function Cost measures and other.
Ch 4. Combinational Logic Design Principles Combinational Logic Circuit –Outputs depend only on its current inputs –No feedback loop Sequential Logic Circuit.
Boolean Algebra 1854, George Boole created a two valued algebraic system which is now called Boolean algebra. 1938, Claude Shannon adapted Boolean algebra.
ECE 2110: Introduction to Digital Systems PoS minimization Don’t care conditions.
Chapter 4 Combinational Logic Design Principles. Overview Objectives -Define combinational logic circuit -Analysis of logic circuits (to describe what.
ECE 3110: Introduction to Digital Systems Symplifying Products of sums using Karnaugh Maps.
Circuit Minimization. It is often uneconomical to realize a logic directly from the first logic expression that pops into your head. Canonical sum and.
Chapter 2 Two- Level Combinational Logic. Chapter Overview Logic Functions and Switches Not, AND, OR, NAND, NOR, XOR, XNOR Gate Logic Laws and Theorems.
ECE 3110: Introduction to Digital Systems
ENG241 Digital Design Week #2 Combinational Logic Circuits.
ECE 3110: Introduction to Digital Systems Chapter #4 Review.
Digital Design: Principles and Practices Chapter 4 Combinational Logic Design Principles.
BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION
CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC
ECE 2110: Introduction to Digital Systems
Chapter 3 Simplification of Switching Functions. Simplification Goals Goal -- minimize the cost of realizing a switching function Cost measures and other.
Digital Systems Design 1 Signal Expressions Multiply out: F = ((X + Y)  Z) + (X  Y  Z) = (X  Z) + (Y  Z) + (X  Y  Z)
Digital Logic.
CHAPTER 3 Simplification of Boolean Functions
ECE 2110: Introduction to Digital Systems
De Morgan’s Theorem,.
ECE 2110: Introduction to Digital Systems
Chapter 4. Combinational Logic Design Principles
CSC205 Jeffrey N. Denenberg Lecture #5
Chapter 2: Boolean Algebra and Logic Functions
14:332:231 DIGITAL LOGIC DESIGN Boolean Algebra
ECE 2110: Introduction to Digital Systems
Logic Gates and Boolean Algebra
CS 105 Digital Logic Design
CHAPTER 2 Boolean Algebra
ECE/CS 352 Digital Systems Fundamentals
Boolean Algebra and Combinational Logic
Princess Sumaya University
CHAPTER 3 SETS AND BOOLEAN ALGEBRA
ECE 2110: Introduction to Digital Systems
ECE 331 – Digital System Design
EEL 3705 / 3705L Digital Logic Design
Lecture 4 Sums of Product Circuits Simplification
BASIC & COMBINATIONAL LOGIC CIRCUIT
CSE140 HW2 Preparation Xinyuan Wang 04/20/2018.
Digital Logic & Design Dr. Waseem Ikram Lecture 13.
CHAPTER 5 KARNAUGH MAPS 5.1 Minimum Forms of Switching Functions
SYEN 3330 Digital Systems Chapter 2 – Part 4 SYEN 3330 Digital Systems.
Introduction to Digital Systems
Chapter 3 Gate-level Minimization.
Chapter 2 Introduction to Logic Circuits
EE121 John Wakerly Lecture #3
Overview Part 2 – Circuit Optimization
3-Variable K-map AB/C AB/C A’B’ A’B AB AB’
Laws & Rules of Boolean Algebra
Chapter 2 Digital Design and Computer Architecture, 2nd Edition
Chapter 4 Combinational Logic Design Principles. Overview Objectives -Define combinational logic circuit -Analysis of logic circuits (to describe what.
Lecture 2: Combinational Logic Design
Presentation transcript:

ECE 3110: Introduction to Digital Systems Chapter #4 Review

Switching Algebra Variables, expressions, equations Axioms (A1-A5 pairs) Theorems Single variable 2- or 3- variable N-variables Prime, complement, logic multiplication/addition, precedence

How to prove a theorem? Perfect induction (1,2,3-variable) Finite Induction (n-variable) Method used in Exercise 4.29

Duality Swap 0 & 1, AND & OR Principle of Duality Result: Theorems still true Principle of Duality Any theorem or identity in switching algebra remains true if 0 and 1 are swapped and • and + are swapped throughout. Fully parenthesized before taking its duality

DeMorgan Symbol Equivalence

Likewise for OR

Representations for a combinational logic function Truth table Algebraic sum of minterms (canonical sum) Minterm list Algebraic product of maxterms (canonical product) Maxterm list

Combinational-circuit analysis Obtain a formal representation of a given circuit Truth table: axioms, exhaustive Logic expression: algebraic approach Simulation/ test bench: HDL

Combinational circuit synthesis Description--->combinational logic circuit. Description: Word description of a problem using English-language connectives Write corresponding logic expression/truth table Manipulate the expression if necessary. Build a circuit from the expression.

Minimization Logic Function minimization : Simplifying the logic function to reduce the number and size of gates. Minimization methods: 1- Algebraic simplification: Using theorems T9,T9’, T10,T10’ 2- Karnaugh map (SOP, POS, multiple-outputs, Don’t Cares) 3- CAD tools, HDLs

Simplifying SOP: Draw K-map Find prime implicants (circle largest rectangular sets of 1s: …16,8,4,2,1) Find distinguished 1-cell Determine essential prime implicants if available Select all essential prime implicants and the minimal set of the remaining prime implicants that cover the remaining 1’s.

Simplifying POS Products-Of-Sums (POS) minimization Duality: circle 0s on the K-map F=(F’)’ Draw a K-map for F’ Simplifying SOP for F’ Get POS for F using DeMorgan theorems repeatedly=(F’)’

Other minimization issues Don’t care conditions d Since the output function for those minterms (maxterms) is not specified, those minterms (maxterms) could be combined with the adjacent 1 cells(0-cells) to get a more simplified sum-of-products (product-of-sums) expression. d cells are only combined when we have to. Multiple-outputs Term sharing can reduce costs

Timing hazards A properly designed two-level SOP (AND-OR) circuit has no static-0 hazards. It may have static-1 hazards. A properly designed two-level POS (OR-AND) circuit has no static-1 hazards. It may have static-0 hazards. Dynamic hazards do not occur in a properly designed two-level AND-OR or OR-AND circuit. It may occur in multilevel circuits. A brute-force method of obtaining a hazard-free realization is to use the complete sum or complete product. Hazard analysis and elimination are typically needed in the design of asynchronous sequential circuits.

Chapter Summary Boolean Algebra is used to represent , manipulate and simplify logic functions. Truth table represents the logic function by listing the output for each possible combination of the inputs. Combinational circuit analysis: - The logic function is obtained from the logic circuit. - The truth table is obtained from the logic circuit by evaluating the logic function for each combination of the input variables. - The Canonical sum ( sum-of-products ) is the sum of all minterms in the truth table. - The Canonical product ( product-of-sums ) is the product of all maxterms terms in the truth table. - Boolean algebra theorems are used to simplify the canonical forms and obtain a simplified representation of the logic function

Chapter summary Combinational circuit synthesis: - The logic circuit is obtained from the logic function. - There are four equivalent canonical implementations of a logic function: - AND-OR & NAND-NAND - OR-AND & NOR-NOR - Karnuagh map is used to simplify the canonical forms: 1- The canonical sum expression is simplified by combining the 1’s to obtain the minimal sum. 2- The canonical product is simplified by combining the 0’s to obtain the minimal product. The minimal sum and the minimal product implementations could produce hazards