Adapted by Dr. Adel Ammar Computer Organization Sequential Circuit Design Procedure Part 3: Counters and State Machines Adapted by Dr. Adel Ammar Give qualifications of instructors: DAP teaching computer architecture at Berkeley since 1977 Co-athor of textbook used in class Best known for being one of pioneers of RISC currently author of article on future of microprocessors in SciAm Sept 1995 RY took 152 as student, TAed 152,instructor in 152 undergrad and grad work at Berkeley joined NextGen to design fact 80x86 microprocessors one of architects of UltraSPARC fastest SPARC mper shipping this Fall

Overview From the problem specification Create a state diagram Convert the state diagram to a state table Determine inputs, states, and outputs variables of the circuit Convert next states and outputs to flip-flop input and output equations Create K-map for each output and flip-flop input as a function of inputs, and present states Determine minimized sum-of-product representation for each output variable Draw circuit diagram

Binary Counter 1 1-bit Binary Counter using D flip-flops State Diagram State Table + Excitation Table D = Q’(PS) Circuit 1 Q (PS) (NS) D 1 D Q Q’

4-bit binary up counter In synchronous counters, all FFs are triggered by the same input clock. A counter may operate without an external input (except for the clock pulses!)

2-bit Binary Counter 2-bit binary counter using D flip-flops with an Enable Input State Diagram 00 10 11 01 E=1 E=0

Binary Counter State Table E Q1 (PS) Q2 (NS) 1

Binary Counter State table + excitation tables E Q1 PS Q2 NS D1 D2 1

Binary Counter Karnaugh Maps D1 = E’Q1 + Q1Q2’ + EQ1’Q2 D2 = E’Q2 + EQ2’ D2 = E XOR Q2 Q1Q2 E 00 01 11 10 1 Q1Q2 E 00 01 11 10 1

Binary Counter D Q1 Q1’ D Q2 Q2’ E

Finite State Machine Specify the problem with words (e.g. Design a circuit that detects three consecutive 1 inputs) Assign binary values to states Develop a state table Use K-maps to simplify expressions Flip flop input equations and output equations Create appropriate logic diagram Should include combinational logic and flip flops

Example: Sequence Recognizer 1) verbal specifications: A sequence recognizer is to be designed to detect an input sequence of ‘1011’. The sequence recognizer outputs a ‘1’ on the detection of this input sequence. The sequential circuit is to be designed using JK and D type flip-flops. Sample Input/Output Trace

Example: Sequence Recognizer 2) State diagram: A state diagram consists of circles (which represent the states) and directed arcs that connect the circles and represent the transitions between states. In a state diagram: The number of circles is equal to the number of states. Every state is given a label (or a binary encoding) written inside the corresponding circle. The number of arcs leaving any circle is 2n where n is the number of inputs of the sequential circuit. The label of each arc has the notation x/y, where x is the input vector that causes the state transition, and y is the value of the output during that present state. An arc may leave a state and end up in the same or any other state.

Example: Sequence Recognizer 2) State diagram: Observations: We do not have an idea about how many states the machine will have. The states are used to “remember” something about the history of past inputs. For the sequence 1011, in order to be able to produce the output value 1 when the final 1 in the sequence is received, the circuit must be in a state that “remembers” that the previous three inputs were 101. There can be more than one possible state machine with the same behavior.

Example: Sequence Recognizer Deriving the state diagram: ‘S1’ represents a state when the last single bit of the sequence was one. ‘S2’ represents detection of ‘10’ as the last two bits of the sequence In state ‘S3’, we have detected input sequence ‘101’ state diagram

Example: Sequence Recognizer 3) Deriving the state table: A state table represents time sequence of inputs, outputs, and states in a tabular form. OR The states in the constructed state diagram have been assigned symbolic names rather than binary codes. It is necessary to replace these symbolic names with binary codes in order to proceed with the design. In general, if there are m states, then the codes must contain n bits, where 2n ≥ m, and each state must be assigned a unique code. There can be many possible assignments for our state machine.

Example: Sequence Recognizer State Table The binary code of the present state at a given time t represents the values stored in the flip-flops; and the next-state represents the values of the flip-flops one clock period later, at time t+1.

Example: Sequence Recognizer General Structure of Sequence Recognizer What remains to be determined is the combinational circuit which specifies the external outputs and the flip-flop inputs.

Example: Sequence Recognizer 4) Deriving the Excitation Table: The excitation table describes the behavior of the combinational portion of sequential circuit. we need to simplify the excitation table in a similar way we used to simplify truth tables for purely combinational circuits. Whereas in combinational circuits, our concern were only circuit outputs; in sequential circuits, the combinational circuitry is also feeding the flip-flops inputs. Thus, we need to simplify the excitation table for both outputs as well as flip-flops inputs.

Summary Flip flops contain state information State can be represented in several forms: State equations State table State diagram Possible to convert between these forms Circuits with states can take a finite set of values Finite state machines are the basis of many digital systems Design should start from clear specifications Develop state diagram and state table Optimize using combinational design techniques