Analysis of a MOSFET operating as an RF power detector Centro Tecnológico Departamento de Engenharia Elétrica Laboratório de Circuitos Integrados Analysis of a MOSFET operating as an RF power detector Authors: M.Sc. Daniel Silva Piovani – danpiovani@ieee.org Ph.D. Fernando Rangel de Sousa - rangel@ieee.org Abstract This paper presents the analysis of a MOSFET biased in the triode region operating as a power detector. Two modes of operation are evaluated, current mode and voltage mode. For each mode, we develop expressions relating a DC signal and the squared amplitude of a RF signal. A MOSFET compact model, valid for any inversion level, is used, permitting to predict the detector behavior with a reasonable accuracy. Optimization of the CMOS power detector is discussed remarking the trade-off between sensor’s sensitivity and input impedance. The approach is validated through simulations and measurements results, which present good agreement with the theory. Simulations and Results MOSFET as an RF Power-to-DC current transducer There are two techniques to measure the DC current, dependent on the DC impedance of the DC amplifier (Fig. 1): Current mode technique (low DC impedance). Voltage mode technique (high DC impedance). Fig. 2- Output DC current (IDC) according to (2), ADS HB simulation and measurements as a function of if ( f = 2.4 GHz – CMOS 0.18 ). Fig. 3 - Output DC voltage (VDC ) according to (3), ADS HB simulation and measurements as a function of if ( f = 2.4 GHz – CMOS 0.18 ). Fig. 1 – Behavioral model of the power transducer. MOSFET drain current using a charge based model (ACM). DC current generated by the RF input signal in current mode. DC voltage generated by the RF signal in voltage mode. Fig. 4 – Simulated and theoretical power detector input impedance as a function of the forward inversion level ( f = 2.4 GHz – CMOS 0.18 ) DC current and voltage for RF weak signals. Conclusions Expressions for the sensitivity of a CMOS power detector from low to high input signal power are obtained and compared with simulated and measured values. The behavior of the input impedance with the aspect ratio and inversion level values is studied, emphasizing the tradeoff between sensitivity and input impedance, showing the versatility of the design variables which allows power detector designs for different applications. Input impedance seen by the power detector input. Integrated Circuits Laboratory http://www.eel.ufsc.br/~lci LCI/EEL/CTC/UFSC – 88040-900 Florianópolis – SC – Brazil Phone +55 48 3721-7720