D. Woog M.J. Barnes, J. Holma, T. Kramer Magnetic core and semiconductor switch characterisation for an Inductive Adder kicker generator D. Woog M.J. Barnes, J. Holma, T. Kramer David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Content FCC-hh injection Inductive Adder concept Magnetic core characterisation Semiconductor switch characterisation Preliminary prototype design Milestones and next steps David Woog - FCC Week 2017, Berlin 31/05/2017

FCC-hh injection system LHC SPS FCC Injection from high energy booster (HEB) into FCC Injected bunch train needs to be deflected onto the circular orbit Circulating bunches must not be kicked Pulsed magnetic field in kicker magnet requires high power pulse generator Kicker (pulse) generators Septum magnets Kicker magnets Injected bunch train Circulating bunch trains David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin FCC-hh injection Different high energy booster (HEB) options for FCC are in discussion, based on: SPS (0.45 TeV, 1.3 TeV) LHC (1.6 TeV, 3.3 TeV, 6.5 TeV) FCC (3.3 TeV, 6.5 TeV) In every case a reliable and fast injection kicker system is needed Baseline HEB is LHC at 3.3 TeV Parameter Unit Value Kinetic Energy [TeV] 3.30 Angle [mrad] 0.18 Pulse flat top length [µs] 2.00 Flat top tolerance [%] ±0.50 Field rise time 0.425 Voltage [kV] 15.70 Current [kA] 2.50 System impedance [Ω] 6.25 Parameters for FCC-hh injection David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin FCC injection – generator options Required field rise time: 0.425 µs → 0.350 µs of kicker magnet fill time → 0.075 µs remain for pulse current rise time For machine protection reasons high reliability of the kicker system is necessary!! → Thyratron pre-firing problems are unacceptable for FCC ~340mm New pulse generator design is needed Thyratrons must be avoided as switch Semiconductor (SC) switches are a promising alternative Two main pulse generator designs based on SC-switches under consideration: Inductive Adder (IA) Solid state Marx generator see Poster on Tuesday by A. Chmielinska «Solid-State Marx generator for use in the injection kickers of the FCC» High voltage thyratron David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Inductive Adder concept Stack of 1:1 transformers Secondary windings are connected in series Parallel branches of primary windings define max. output current Parameters such as insulation properties, parasitic inductances, etc. define system impedance 𝐴 c 𝐼 sec Stalk (secondary) magnetic core 𝐼 prim primary winding insulation parallel branches PCB Schematic drawing of an IA [4] David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Inductive Adder concept Advantages and disadvantages of the IA compared to traditional pulse generators (PFN, PFL) Pro Con Based on semiconductor switches Ability to turn on and off current Hence eliminate PFN/PFL Output transformer necessary Modular design High energy storage in capacitors All electronics ground referenced Reduced maintenance Larger dynamic range Modulation of output pulse possible [5] Simple replacement of components Easy to adapt to different applications Main components of the IA: Magnetic core (following slides) Semiconductor switches (following slides) Pulse capacitor (tested and selected) Insulation material (selected) High voltage diodes David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Magnetic core Important key component of the IA Dimensions and material characteristics are important Saturation of core must be avoided Large core cross sectional area 𝐴 c needed Pulse parameters 𝑡 pulse , 𝑉 layer Magnetic flux density swing ∆𝐵 c Core fill factor η Fe Security margin 𝛼 m 𝐴 c = 𝑡 pulse ∙ 𝑉 layer ∙ 𝛼 m ∆𝐵 c ∙ η Fe Parameters of interest: Equivalent loss resistance ( 𝑅 c ) Magnetizing inductance ( 𝐿 m ) B-H curve Frequency behaviour Biasing current ( 𝐼 bias ) Equivalent circuit of the core: 𝐿 m 𝑅 c 𝑉 out David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Measured B-H cures of different core types Nanocrystalline tape wound core with 30 cm ruler Thank you to Silvia Aguilera, Michal Krupa and Patrick Odier from CERN BE-BI group for assistance with measuring the B-H curves. David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Measurements on sample cores Test setup for sample cores, based on the prototype for CLIC DR IA : A MOSFET is discharging a capacitor over the primary winding of the core The primary current is measured with a current sensor The output voltage is measured on the secondary winding without load On another test setup the B-H curves were measured Equivalent circuit of test setup: 𝐿 m 𝑅 c 𝑉 out 𝐶 c 𝑆 A Current sensor Pulse capacitor MOSFET Core housing (primary winding) David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Pulse characterisation of cores 𝑉 c =350 V 𝐼 0 𝑡 pulse =4.2us ∆ 𝐼 m 𝐿 m = 𝑉 c ∙ ∆𝑡 pulse ∆ 𝐼 m 𝑅 c = 𝑉 c 𝐼 0 Core 1 2 3 4 5 6 7 8 𝑅 c in Ω 55 50 65 75 150 160 230 200 𝐿 𝐦 in µH 282 367 191 56 42 30 30.6 B-H shape square linear David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Results of core measurements Core 1 2 3 4 5 6 7 8 9 10 𝑅 c in Ω 55 50 65 75 150 160 230 200 70 𝐿 𝐦 in µH 282 367 191 56 42 30 30.6 28.8 B-H shape square linear ∆𝑩 𝐬𝐚𝐭 in T 2.4 2.1 2.0 𝑰 𝐛𝐢𝐚𝐬 in A 15 20 Cores 1-4 have been chosen as they best suit the requirements: Highest inductance of all sample cores Biggest ∆𝐵 sat Low biasing current required High inductance and ∆𝑩 𝐬𝐚𝐭 improve the IA design. The higher losses can be accepted. David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Considerations on Semiconductor Switches Semiconductor (SC) switches to replace Thyratrons: SiC MOSFETs seem promising Advantages compared to Si components Fast switching times Lower values of 𝑹 𝐨𝐧 (<0.05 Ω) Up to 1700 V available Wide bandgap technology is a ‘rather’ new Devices are still in development Nevertheless there are already suitable devices available Capability of devices has to be measured ( 𝑡 r,0.5−99.5 , 𝐼 D,pulse(2.5μs,1kV) ) Radiation hardness of SiC devices is of interest Examples for SiC MOSFETs available on the market: SiC devices 1 2 3 4 𝑉 DS 1200 V 1700 V 𝑡 r,10−90 32 ns 9 ns 20 ns 44 ns 𝑡 f,10−90 28 ns 22 ns 18 ns 𝐼 D,25°C 90 A 80 A 72 A 95 A 𝐼 D, pulse 250 A 190 A 160 A 237 A 𝑅 on 25 mΩ 40 mΩ 45 mΩ 22 mΩ High 𝑉 DS is required to reduce number of layers High 𝐼 D, pulse is required to reduce number of branches High 𝑅 on causes increased voltage drop Fast rise time is required David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Semiconductor switches characterisation The capability of different sample devices has been tested High current capabilities for ~2.5 µs pulse at 1 kV Fast current rise times at high voltage from 0.5 to 99.5 % The switching behaviour of the devices is strongly dependend upon the gate driver circuit Device 1 2 3 𝑡 r,0.5−99.5 64 ns 100 ns 76 ns 𝐼 pulse,2.5µs >200 A Test results seem promising PSpice simulations with measured values show a sufficiently fast rise time Further measurements are ongoing Radiation hardness is of interest – tests have not been successful yet Any experience welcome! David Woog - FCC Week 2017, Berlin 31/05/2017 Ruben Garcia Alia 16:30 same room, presentation about radiation hardness

David Woog - FCC Week 2017, Berlin Preliminary prototype IA design Based on the component characterisation a prototype IA has been designed: 21 constant voltage layers 2 special (modulation) layers for ripple and droop compensation 24 parallel branches per layer Parameter Unit Value Nr. of constant voltage layers - 21 Nr. of modulation layers 2 Nr. of branches per layer 24 Characteristic impedance Ω 6.25 Voltage per layer V 960 Current per branch A 105 Total height mm ~1200 Output voltage kV 15.62 Output current kA 2.5 David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Milestones and next steps Basic design steps Definition of component requirements Hardware design First prototype (~5 layers) Measurements 2019 2018 2017 2016 2015 Component selection Characterisation of components Start of hardware design Optimisation Final prototype (21+2 layers) Final measurements Contribution to FCC CDR Next steps: Production of hardware components (designed) Core housing Stalk End caps Development of final PCB (design ongoing) Gate driver circuit MOSFET switch HV diode Obtain outstanding parts and start prototype assembling David Woog - FCC Week 2017, Berlin 31/05/2017

Thank you for your attention! References: [1] L.S. Stoel et al., “High Energy Booster Options for a Future Circular Collider at CERN”, proceedings, IPAC’16, Busan, Korea (2016). [2] D. Woog et al., «Design of an Inductive Adder for the FCC Injection Kicker Pulse Generator», to be published in the IPAC’17 proceedings, Kopenhagen, Denmark (2017). [3] M. J. Barnes et al., “Pulsed Power at CERN”, to be published in the EAPPC 2016 proceedings, Lisbon, Portugal (2016). [4] T. Kramer et al., “Considerations for the injection and extraction kicker systems of a 100 TeV centre of mass FCC-hh collider”, IPAC’16, Busan, Korea (2016). [5] J. Holma et al., “Measurements on prototype inductive adders with ultra-flat-top output pulses for CLIC DR kickers”, proceedings, IPAC’14, Dresden, Germany (2014). David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Backup David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin BH curve measurement test setup from BE-BI-PI Power supply Oscilloscope RC integrator to measure 𝑈 sec 𝑑𝑡 ~ 𝐵 Function generator Current limiting resistor Test core Other required parameters: Core dimensions, weight, fill factor, no of windings Amplifier, incl. 1 Ω Shunt to measure 𝐼 prim ~ 𝐻 Thanks to S. Aguilera and M. Krupa David Woog - FCC Week 2017, Berlin 31/05/2017

David Woog - FCC Week 2017, Berlin Radiation hardness tests on SiC MOSFETs Radiation hardness of power semiconductor devices is a real concern High energy hadrons (HEH, >20 MeV) can cause single event burnouts (SEB) in power MOSFETs SEBs cause short circuits between drain and source The behaviour of Si semiconductors under radiation is known Little experiences with SiC semiconductors as a new device technology Radiation hardness tests in the CHARM facility at CERN have been successfully made with Si MOSFETs, GTOs and IGBTs Using the existing test setup to test SiC MOSFETs was more difficult than expected Reliable measurements were not possible with this setup until now Over current protection needs to be adapted to SiC specification Any existing experiences in this field are interesting David Woog - FCC Week 2017, Berlin 31/05/2017