Application of VATAGP7 ASICs in the Silicon detectors for the BM@N central tracker (forward part) S. Khabarov, A. Makankin, N. Zamiatin, 11.09.2017, JINR,Dubna ASIC - Application-Specific Integrated Circuit VATAGP7 manufactured by IDEAS (Integrated Detector Electronics AS), Norway DSSD - Duble Side Si Detector – (two coordinate microstrip silicon detector) BM@N - Baryon Matter at Nuclotron

The scheme of BM@N experiment with the legend of main detecting systems Main goal of BM@N experiment is to study properties of baryon matter which produced in heavy ion collisions with fixed target in the beam energy range from 1 to 4.5 GeV per nucleon. Central tracking system is located inside the analyzing magnet and is intended for reconstruction of tracks in nucleon-nucleon interactions of the beam of accelerated ions on a fixed target. The coordinate planes of the tracker consist of silicon double-sided strip detectors and gas detectors GEM with two coordinate readings (strips), these detectors are able to work with high coordinate resolution in a magnetic field.

The appearance of a rectangular detector module on the both sides p+ side n+ side The module consists of two square shape silicon DS-microstrip detector, two electronics read-out cards (one on each side of the detector) and a mechanical frame for precise module positioning, assembling of detectors and read-out cards.

The coordinate Si-plane consist of 8 detector modules with 10240 strips (measuring channels) is assembled on a mechanical frame and placed in a box which is light and electromagnetic shielding

Ultrasonic bonding of the strip to strip between two DS-Si-sensors on module

The functional scheme of detector module and appearance of two electronic boards DSSD with DC topology don’t contain integral resistors and capacitors (RC), therefore external R, C are required to supply bias voltage to each strip and to electrically decouple the DC current from the electronic inputs. This role is performed by Pitch Adapter (PA) with a topology of two types for p+ and n+ sides of the detector. In addition, PA has topology of contact pads similar to chips located on the side of electronic chips. PA modules are made on sapphire plates with an epitaxial layer of silicon (SOI). Integrated poly silicon bias resistors have a value of 0.7 – 1.0 MΩ, decoupled capacitors have a value of 140 pF. PA is assembled together with read-out ASICs on the read-out card. Positive polarity signals come from detectors to P+ read-out card (black PCB) while negative signals come to N+ read-out card (red PCB).

Cross section of the pitch adapter 640 chanels (PA-640)

View of the rear side PA-640

VATAGP7 PA-640

Visual control in LHEP of the PCBs-640 before encapsulation of VATAG7-chips Red PCB-640n+ (№007), chip#2, the type of defect: the small piece of the Al-wire Ø18 mkm on the surface PCB

The architecture of VA and TA parts

The read-out electronics is designed and based on the non-encapsulated ASICs crystals – VATAGP7.1, manufactured by IDEAS2 (Norway). Each board contains five ASICs, bonding and filled with black compound The main parameters of the analog part of this IC: Number of analog inputs – 128; The polarity of the input signals – +/-; Gain – 16,5 μA/fC; Dynamic range of signals – ±30 fC (~8 m.i.p.); Integration time (slow SA) – 500 ns; Integration time (fast SA) – 50 ns; Intrinsic noise (at Cin = 0 pF) – 70 e; Dependence of noise on input capacitance – 12 e/pF; The main parameters of read-out electronics card: Number of analog inputs – 640; Five analog multiplexer output with read out clock - 1.25 MHz Input charges from -30 fC to +30 fC Slow shaper shaping time - 0.5 µs Fast shaper shaping time -50 ns Differential current out – 20 µA/fC Adjustable threshold, from 0.12 fC min, (at 0 load) Power supply -2.0 V and +1.5 V Total power is 280 mW / ASIC For reminder: the value of the signal 1 m.i.p.(Si=300mkm)=4 fC (~24×103 e)

The data of measurements with a radioactive source of electrons 106Ru

Signals from passing through the module of relativistic electrons (106Ru)

The row data of Si-plane measurements on BM@N experiment, march-2017, CH2- target, Ed=4.5 GeV/n Row data: run_1898 (CH2– target), 4.5GeV/n, M8_2 total event 22161.png

Row data: run_1898 (CH2 – target), 4.5GeV/n, M8_1 event 6535.png

Row data: run_1913 (Pb - target), 4.5GeV/n, M8_1

Row data: run_1913 (Pb-target), 4.5GeV/n, M8_1 event 325.png

Row data, Run 1619: direct beam 12C, E=4 Row data, Run 1619: direct beam 12C, E=4.5GeV/n, Field=0 Sp57=350A_no Target.png

Why we use of the VATAG7P : Summary: Why we use of the VATAG7P : Design and main parameters of VATAGP7 to aproach for the our specification of DSSD-modules/tracker BM@N (128 chanels/chip, low noise, low power) VATAGP7 is the commercial ASIC and of the delivery time is (3÷4) month VATAGP7 designed and manufactured by IDEAS (Integrated Detector Electronics AS, Norway), IDEAS is Company with the longtime positive history of the application they ASICs for nuclear physics ASICs for collider experiments: SVX5 - (D0/Fermi-lab, Phenix/BNL, APV26 – CMS, ATLAS/CERN ) – Radiation Hard technology (commercial ?) Plans on future: - To decrease of the readout time (dead time-DT)<30 mks, now (128=128×1) at Fmux=1.25 MHz, DT~100 mks - To discuss of the possibility for increasing Fmux (5 MHz ???) - To discuss of the new structure ASIC (128=32×4)