SiTRA multipurpose and standalone test infrastructure

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Presentation transcript:

SiTRA multipurpose and standalone test infrastructure EUDET Meeting September 29, 2010, Jacques David On behalf of the LPNHE-LC team

Test beam Infrastructure Major deliverable for EUDET Several versions have been developed A new version was developed in 2009 and used since May 2010. It is multipurpose & standalone, i.e. includes => a mechanical infrastructure with Faraday cage, cooling, alignment (including IR laser system), the possibility to host its own telescope system and several layers of Si modules. => a dedicated DAQ hardware and software system easy to interface to any other DAQ was developed based on VHDL + C++ & ROOT for the software and a DAQ hardware that is adapted for the reference FE readout (VA1’) or the new developed SiTR_130 chips. It multipurpose as it can be adapted to test any type of new sensors and/or FE readout chip. It can be used in Lab test bench or at test beam

Stand-alone & portable test bench for multiple applications + associate DAQ Ex: test of alignment system Tests of alignment system based on AF HPK sensors Alignement test with IR laser Reconstruct signal

Mechanical conception of modules ● Module equipped with one or more sensors ● Hybrid card (for now) ensure a kind of flexibility for connection to front end electronics (related to used ASIC) ● Constraints linked to “bonding” between same module sensors and pitch adapter (now in CERN) ● Choice of robust support structure to ease numerous manipulations when we test ● Protection case for transportation or storage.

Mechanical conception of tools Modules building Alignment tool Precision alignment between different parts of module: Silicium sensors, pitch adapter, front-end electronics Gluing tool Preservation of alignment Integration of sensors on Carbone support

Standalone TB infrastructure: FE & DAQ Electronics VA1’ ASIC used as reference devices DAQ Software: VHDL & ROOT C++ based Easy to combine to any other DAQ system

Only one USB link for the whole box Up to 6 daughter boards for VA1’ ADC 16 bits serial From VA1 Level translation Sr Supplies FPGA USB Sequencer Serial DATA 220V ac sequencer sequencer Daughter board A new DAQ electronics for VA1’ readout only Le fil gris à connecteur noir (à droite) est la commande “RESET” et “Chargement du µprogramme” Les ADC sont des 16 bits @ 500 KHz, pas chers et standard. La carte mère porte l’Altera, et sera changée quand nous passerons (?!) à l’Ethernet Les cables LEMO (en bas) sont pour le trigger (int et ext) et la commande du laser Only one USB link for the whole box Under development USB TCP IP DAQ The electronic box 7 7

Test beam at CERN-SPS H6, with 120 GeV proton beam A. Charpy (LPNHE), M. Fernandez (IFCA), G. Alampi (Torino), J. David (LPNHE), M. Dhellot (LPNHE), P, Ghislain (LPNHE), A. Savoy-Navarro (LPNHE), D. Gamba (Torino), F. Kapusta (LPNHE), G. Cotto (Torino), P. Mereu (Torino), W. da Silva (LPNHE)

3D Table (Torino) Test set up beam - 5 motorized & controlled movements:4 linear+1 rotation 2 movements for positioning test bench; 3 for a 3D scan of the DUT - Main feature: highly precise position repeatability: with Linear mvt ˂ 0.1mm and rot ˂ 0.01 degree (tested by TB) - Control & monitor via serial line by LabView and through Ethernet to DAQ thus recording DUT positions/each run. 3D Table (Torino) Test set up SiTRA test infrastructure beam LabView based GUI allowing the adjustement of 4 movements available with this 4D Table

Standalone T.B. infrastructure CERN SPS, May 2010 Test in May 2010 at SPS-CERN (alignment sensors and New 3D Table made by Torino 11

SPS May 2010 T.B.:Online plots Single event: Raw data/ch/module Idem but pedestal subtracted Accumulated signals => Signal/module “noise” 4σ subtracted Single event: Hits in each module An online system (NARVAL, C++, ROOT) developed by A. Charpy works during May Tests. It is the system used also at Lab test bench for tests with system

Taking Data Logbook data taken in May 2010 Scan in position of the HPK A.F. sensor

Data Analysis S/N=28 Evaluate S/N for each position and verify result is independent of scan position. S/N=35 In progress: Tracks reconstruction (5 layers) 14

Preparing modules and FEE for tests of new sensors at SPS-CERN in November Support structures: ready for the new VTT and IRST active edge sensor prototypes To be ready for the November test beam at SPS-CERN. New HPK DSSD sensors to be also tested at SPS. Support structure for 5x5cm2 VTT + FEE board Support structure for 2.5x5cm2 IRST + FEE board New VA1’ Front-end card support equipping all sensor-channels (1024 channels/sensor, 8chips; Each chip process 128 channels)

Goal in November: test of new sensor types

Modification of stand-alone test bench for November 2010 tests Addition of a vertical strips sensor, each side i-e for the beam telescope-sensors to define a XY position (in& out)

Development of a new online system more powerful for beam tests Actually based on NARVAL: Distributed acquisition system written in ADA Implement software layer of data processing. Divide every acquisition in two activities « Producers et Consumers » and one treatment: Filter Producer Consumer Filter We use it for handling read data from USB card (Producer) up to disk writing(consumer). Pros: fast, distributed, flexible coding. Cons: weak docs, still need some complementary modules for user management, Slow Control & DAQ, very new.

Alternative in progress based on « Midas » Generic acquisition system for small size & middle size experiments . Known for years at TRIUMF and PSI Easily portable for any operating system (embedded systems included) Include a « slow control » system, on-line database and an « history system » Tests in progress with this system to be used during November tests and a future embedded system. VHDL software is slightly modified for processing data from new front-end cards in November