Professor Ronald L. Carter

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Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/ EE 4345 - Semiconductor Electronics Design Project Spring 2002 - Lecture 04 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/ L 04 24Jan02

Practical Junctions Junctions are formed by diffusion or implantation into a uniform concentration wafer. The profile can be approximated by a step or linear function in the region of the junction. If a step, then previous models OK. If not, 1/2 --> M, 1/3 < M < 1/2. L 04 24Jan02

Law of the junction (injection of minority carr.) L 04 24Jan02

Carrier Injection and diff. ln(carrier conc) ln Na ln Nd ln ni ~Va/Vt ~Va/Vt ln ni2/Nd ln ni2/Na x -xpc -xp xnc xn L 04 24Jan02

Ideal diode equation I = Is [exp(Va/nVt)-1], Is = Isn + Isp L 04 24Jan02

Diffnt’l, one-sided diode conductance Static (steady-state) diode I-V characteristic IQ Va VQ L 04 24Jan02

Diffnt’l, one-sided diode cond. (cont.) L 04 24Jan02

Charge distr in a (1- sided) short diode dpn Assume Nd << Na The sinh (see L12) excess minority carrier distribution becomes linear for Wn << Lp dpn(xn)=pn0expd(Va/Vt) Total chg = Q’p = Q’p = qdpn(xn)Wn/2 Wn = xnc- xn dpn(xn) Q’p x xn xnc L 04 24Jan02

Charge distr in a 1- sided short diode dpn Assume Quasi-static charge distributions Q’p = Q’p = qdpn(xn)Wn/2 ddpn(xn) = (W/2)* {dpn(xn,Va+dV) - dpn(xn,Va)} dpn(xn,Va+dV) dpn(xn,Va) dQ’p Q’p x xn xnc L 04 24Jan02

Cap. of a (1-sided) short diode (cont.) L 04 24Jan02

Diode equivalent circuit (small sig) ID h is the practical “ideality factor” IQ VD VQ L 04 24Jan02

Small-signal eq circuit Cdiff and Cdepl are both charged by Va = VQ Va Cdiff rdiff Cdepl L 04 24Jan02

Reverse bias junction breakdown Avalanche breakdown Electric field accelerates electrons to sufficient energy to initiate multiplication of impact ionization of valence bonding electrons field dependence shown on next slide Heavily doped narrow junction will allow tunneling - see Neamen*, p. 274 Zener breakdown L 04 24Jan02

Ecrit for reverse breakdown (M&K**) Taken from p. 198, M&K** L 04 24Jan02

Reverse bias junction breakdown Assume -Va = VR >> Vbi, so Vbi-Va-->VR Since Emax= 2(Vbi-Va)/W , when Emax = Ecrit BV = e (Ecrit )2/(2qN-) L 04 24Jan02

BV for reverse breakdown (M&K**) Taken from Figure 4.13, p. 198, M&K** Breakdown voltage of a one-sided, plan, silicon step junction showing the effect of junction curvature.4,5 L 04 24Jan02

References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986. L 04 24Jan02

Diode Switching Consider the charging and discharging of a Pn diode (Na > Nd) Wd << Lp For t < 0, apply the Thevenin pair VF and RF, so that in steady state IF = (VF - Va)/RF, VF >> Va , so current source For t > 0, apply VR and RR IR = (VR + Va)/RR, VR >> Va, so current source L 04 24Jan02

Diode switching (cont.) VF,VR >> Va F: t < 0 Sw RF R: t > 0 VF + RR D + VR L 04 24Jan02

Diode charge for t < 0 pn pno x xn xnc L 04 24Jan02

Diode charge for t >>> 0 (long times) pn pno x xn xnc L 04 24Jan02

Equation summary L 04 24Jan02

Snapshot for t barely > 0 pn Total charge removed, Qdis=IRt pno x xn xnc L 04 24Jan02

I(t) for diode switching ID IF ts ts+trr t - 0.1 IR -IR L 04 24Jan02

References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986. L 04 24Jan02