DATE 99 1 Universität Tübingen Technische Informatik Karlheinz Weiß UT Emulation of a Fast Reactive Embedded System using a Real Time Operating System Karlheinz Weiß Thorsten Steckstor Wolfgang Rosenstiel

DATE 99 2 Universität Tübingen Technische Informatik Karlheinz Weiß UT Emulation environment: SPYDER-CORE-P1 DRAM 1-128MB Embedded PowerPC PPC MHz 32 bit microcontroller bus I extension headers Actel add-on II FPGA architectures Xilinx XC6000 Xilinx XC4000 microcontroller core peripherie devices Internet FLASH 8MB Ethernet 10MBit 2 serial ports DPRAM 2KB driver 8 Bit I/O bus analog module CORE-P1 AT-ISA add-on board SPYDER-CORE-P1 hardware VxWorks real-time operating system int_servicecontrollC-server http- server ASI application sofware TCP/ IP AT-ISA bus microcontroller register interface tele_receive tele_send ASI-UART from to analog module Initial ASI hardware (single channel) Target chip: XC4005E, 166 CLBs, utilization: 85%

DATE 99 3 Universität Tübingen Technische Informatik Karlheinz Weiß UT Embedded system performance analysis

DATE 99 4 Universität Tübingen Technische Informatik Karlheinz Weiß UT Results The minimum microcontroller clock frequency is 33 MHz The minimum microcontroller clock frequency is 33 MHz At the minimum working point 77% of the total execution time is consumed by the RTOS At the minimum working point 77% of the total execution time is consumed by the RTOS At the minimal working point the improvement in execution performance with caches is 40% At the minimal working point the improvement in execution performance with caches is 40% This 40% enhancement can only be used for non-real-time critical system services e.g. Internet communication This 40% enhancement can only be used for non-real-time critical system services e.g. Internet communication