HELIX time of flight system electronics concepts Gerard Visser Indiana University CEEM gvisser@indiana.edu HELIX design meeting @ Univ. of Michigan, Feb. 12th, 2016

Dark count rate should be as low as possible General considerations For optimum timing we must pay careful attention to (at least) five issues Scintillator and optics: deliver as many photons to sensors as possible, with minimal skew Actually though only what happens within the response risetime of a single- photon pulse at discriminator matters – quantity and time skew of later photons is irrelevant Electronics noise in terms of photons, divided by slew rate of a single-photon pulse at discriminator, should be as low as possible Note that SiPM’s enormous capacitance makes this difficult in several ways, compared w/ PMT’s Note also that fast is good, but there is such a thing as too fast: The electronics noise generally rises faster than linearly with bandwidth, the slew rate does not (and certainly does not when you hit physical limitations of the sensor). Again this is rather different than with PMT’s. Dark count rate should be as low as possible It contributes jitter just as electronics noise does Perhaps more importantly, higher dark count rate may force higher timing discriminator threshold to avoid pileup problems with the TDC Skew in electrical connections, and random delay (“TTS”) of sensors should be as low as possible If electronics noise and/or dark count noise is dominant, you do not gain by adding sensor area. Number of detected photons, dark counts, and electronics noise all rise in proportion.

A large area SiPM is a very low impedance detector  Collecting the charge generic SiPM model  distributed inductance & resistance not shown  fired pixels (few, proportional to light signal) spectator pixels (many, proportional to active area) CBYPASS A large area SiPM is a very low impedance detector  For TOF, we must collect the signal charge as fast as possible – or at least as fast as the optimal risetime to discriminator. Preamp impedance and bypass capacitor impedance must be low compared to spectator pixels! E.g. 6 nF @ 5 ns risetime  0.4 Ω !! Series connection can help… Load impedance model (preamp)

All SiPM mounted close packed One large light guide Bar, light guide, and SiPM mounting scheme Bar 10 cm × 1.5 cm 6 × SiPM (0.6 cm)2 each All SiPM mounted close packed One large light guide SiPM mounted @ 1.67 cm pitch One small light guide per SiPM Might be mechanically coupled Expect 6 × shorter half as wide? Optical simulations should be used to decide which is best… Lowest time skew (for first photons – not all!) Light collection efficiency (again, for first photons) I think 2nd option is better for the SiPM board assembly, and I am guessing is maybe best performance too. B A FEE board location options (I prefer option A) C SiPM board, glued or clamped to bar & light guide FEE board estimate 9.5 cm × 12 cm

One small light guide per SiPM For comparison – STAR Forward Preshower Detector 244 bars, one end read out Bars 4 cm × 1 cm, 5.8 cm × 1 cm 2 × SiPM (0.3 cm)2 each (for electron, photon identification – no TOF) Length ~1 m (various) SiPM mounted @ 2.0, 2.9 cm pitch One small light guide per SiPM FEE board 3.8 cm × 6.7 cm Note: Light guide exit slightly smaller than SiPM active area FEE board FEE board with temperature compensated bias regulator, current monitor, preamp and cable driver SiPM board

DCR × crosstalk 1-pix Q / capacitance Manufacturer SensL Hamamatsu SiPM candidates µFJ-60035-TSV S13360-6050VE ?? Manufacturer SensL Hamamatsu Active area (6.07 mm)2 (6.00 mm)2 PDE 38 % @ 425 nm 40 % @ 450 nm Dark rate (typ.) 1.7 MHz (2.0 MHz ??) 2.0 MHz Crosstalk 7 % 3 % “Gain” (1-pix Q) 2.8 × 106 1.7 × 106 @ overvoltage 2.5 V 3.0 V Capacitance 4.0 nF ?? 1.3 nF Recharge τ 48 ns ~30 ns ?? Package TSV CSP BGA TSV LGA Price / bar end $ 348 ? 2 pix DCR 119 kHz 60 kHz Cap. FOM 112 µV 210 µV for reference only; there is no particular requirement DCR × crosstalk 1-pix Q / capacitance derived params

TIMING WAVEFORM GENERATOR HELIX TOF frontend board – one per bar end very low input impedance (R values here from nEXO version – ignore!) pink boxes are 6× , i.e. 1 per SiPM chip I MON ADC SLOW SHAPER ADC VOLTAGE REGULATOR SiPM COMMON BASE PREAMP TIMING DISCRIM. TIMING WAVEFORM GENERATOR ADC on SiPM board DAC DAC THERMISTOR TRIGGER DISCRIM. TRIGGER LOGIC DAC DAC

HELIX TOF FEE BOARD – OPTIONS TO CONSIDER Timing measurement HELIX TOF FEE BOARD – OPTIONS TO CONSIDER (I do not necessarily advocate) Instead of using ADC board for timing, can use some other TDC Slow shaper signal can be sampled/digitized on this FEE either in response to local trigger (at <200 kHz, say) or in response to global trigger Default plan for TDC by ADC is a ringing waveform few cycles of about 33 MHz (for 100 MSPS ADC), then “Q-switched” to damp quickly to zero. Overall width should be <500 ns.  can get timing easily on pulses that do not overlap… (Here state slat-end 2-pixel dark rate and then overlap fraction @ 500ns) what else to say? 2π × 33 MHz × 90% × 1024 = 0.19 ADC units / ps 2π × 27 MHz × 90% × 4096 = 0.62 ADC units / ps 2π × 22 MHz × 90% × 16384 = 2.0 ADC units / ps Can do a nice <10ps TDC with this, if we can generate a waveform and transport to the ADC chip with <10ps jitter. Yes we can!

Occupancy from dark counts Each channel (slat end) has 216 mm^2 of SiPM area Assume Hamamatsu SiPM’s 1-pixel dark count rate 12 MHz, 2-pixel DCR 360 kHz, 3-pixel DCR 11 kHz Readout window in TOF can be very narrow, but for data planning purposes let’s assume not so narrow: 500 ns  occupancy 100% @ 1-pixel, 18% @ 2-pixel, 0.5% @ 3-pixel Conclusion We should plan on ZS at 3-pixel signal level Maybe this is the proper threshold for HELIX TOF trigger too? Dark count occupancy is negligible Real hit occupancy = 3 + occasional few more, is that right??