ATLAS ITk Short-Strip Stave prototypes with 130nm chipset Peter W Phillips Rutherford Appleton Laboratory and The University of Oxford On behalf of the ATLAS ITk Collaboration TWEPP 17, UCSC, 13th September 2017

Outline Introduction to ITk Prototyping Results ATLAS ITk Strip Detector Final On-Detector Electronics Final Short-Strip Module Prototyping Prototype Short-Strip Module Prototype non-segmented Short-Strip Stave HV-MUX Modifications Results ENC vs Bias Voltage ENC vs nStrobed ENC Stability Comparison of results On and Off stave Estimation of ENC from Noise Occupancy First Aggressor Study First test with “PP2 DC-DC” Outlook and Conclusions Technical Design Report, April 2017 https://cds.cern.ch/record/2257755/files/ATLAS-TDR-025.pdf

ATLAS ITk Strip Detector To deliver the tracking performance needed at HL-LHC, a new tracking system is needed. An all-silicon design is chosen comprising Pixel layers (red) and Strip layers (blue). The ITk Strip Detector 4 barrels supporting 1.4m “Staves” 2 Long-Strip layers (4.8cm) 2 Short-Strip layers (2.4cm) 2 endcaps each comprising 6 disks tiled with “Petals” 593mm long Modules Conceptually similar, varied topologies Same chipset, different part counts ITk strip ASICs in 130nm CMOS process z [mm]

Final On-Detector Electronics US(A)15 PP2 Segmented Multidrop TTC @ 160Mbit/s Point to point data at 640 Mbit/s DC-DC LV power bus at ~11V 4 (2) HV lines at <700V Common LV/HV return AMAC control & data End of Substructure (EoS) card Links off-detector systems (electrical, optical) to the petal / stave Common 11V supply to EoS and module electronics via DC-DC Petal and Stave layouts will differ, but schematics largely common Bus Tape Large area polyimide flex routing electrical services on the petal/stave Related talk @ TWEPP2017: The End-Of-Substructure Card for the ATLAS ITk Strip Tracker, Peter Goettlicher, 13th Sept. Related poster @ TWEPP2017: … long polyimide cables designed for fast data transmission on ATLAS ITk strip staves, Vitaliy Fadeyev

Final Short-Strip Module 1 Silicon Strip sensor n+ in p, 97mm x 97mm approx 4 banks of 1280 strips, 24.1mm long 75.5 micron pitch 2 Polyimide Flex Hybrids 1 Hybrid Controller Chip (HCCStar) Star architecture: each ABCStar chip has a dedicated 160Mbit/s data path to HCC 10 ATLAS Binary Chips (ABCStar) Binary architecture: 256 channels of trimmable preamplifier / discriminator, pipeline and control logic Dual LDOs to produce separate 1.2V analogue and digital power domains from common 1.5V supply 1 Power Board Point of Load DC-DC converter bPOL12V (formerly known as upFEAST) HV Multiplexer switch “HV-MUX” Radiation hard GaNFET disconnect failing sensor from HV bus Autonomous Monitor And Control chip Multichannel Wilkinson ADC Digital logic to turn on/off LV and/or HV to hybrids in response to commands or anomalous ADC readings Dual Linear Regulators Power AMAC whilst DC-DC off Exploded view of Short-Strip Module Related talk @ TWEPP2017: Radiation Hard GaNFET High Voltage Multiplexing (HV-Mux) for the ATLAS Upgrade Silicon Strip Tracker, Dave Lynn, 14th Sept.

Prototype Short-Strip Module What’s different here? Hybrids Prototype FE chipset HCC and ABC130 Different readout topology Each HCC reads two loops of 5 ABC130 chips (not “STAR”) sending 80 (160) Mbit/s Earlier FE channel design ABC130 FE uses Krummenacher feedback, found to compress n+ in p signal polarity more than expected ABCstar FE uses resistive feedback, also layout changes to reduce noise increase with Total Ionising Dose (TID) Power Board No AMAC DC-DC and HV-MUX enabled by commercial one wire device Autonomous Monitor in HCC reads voltages, temperatures and sensor return current same IP later developed into AMAC DC-DC uses FEAST2 BPOL12V not yet available HV-MUX on mezzanine PCB Oscillator in commercial technology HV-MUX Mezzanine Prototype module SS5 under test Related poster @ TWEPP2017: ATLAS ITk Short-Strip Stave Prototype Module with Integrated DCDC Powering and Control, Ashley Greenall

Prototype Non-Segmented Stave Electrical EoS card with additional SLVS buffer “LH” side: four modules without HV-MUX “RH” side: four modules with HV-MUX Stave uses Electrical EoS card (DESY) Coupled to commercial FPGA by ribbons ITSDAQ firmware / software SLVS buffer added shift CM level and boost current Stave is 13 modules long (1.3m) Bus tapes have single TTC segment Attach (glue) 4 modules per side Akin to one segment of final design Modules from Liverpool / RAL Two HV lines per stave side Two modules per HV line The rest of this presentation gives results from this stave!

HV-MUX Oscillator Modification Rx Cx Modification: RC Filter C6 GaNFET U3 requires +2.5V at gate relative to HVin (-500v) use charge pump to generate this locally Modification shapes square wave into sawtooth Removes high frequency content Beneficial effect shown on next slide The filter has been added to the next power board PCB For the final AMAC , series resistor Rx will be internal

HV-MUX Oscillator Modification Before modification: Noise surplus correlated with HV-MUX oscillator Noise correlated with HV-MUX circuit (Module 7) C6 C3 After modification (RC filter): Noise surplus is gone

Column Average Noise (ENC, RC) Performance Notes Column mean noise is ~40 ENC higher for columns under the hybrids and power board Increased capacitance due to adjacent ground planes Acceptable as long as the ground planes are kept clean Leads to two families of curves on the plots you are about to see Hybrid 01 fails to respond at a low level < 1 event in ~5000, typically at high occupancy When it happens, this is enough to throw a test Hybrid 01 excluded from overnight runs Column Average Noise (ENC, RC) 676 721 706 665 Mean “column average” ENC noise for the 8 modules on the stave (RC @400V sensor bias, nStrobed=256)

Noise vs Bias At 400V, 15 channels of column H05_INN have excess noise due to localised sensor breakdown effects and are excluded from the column averages below. As a result of this effect modules 2 and 3 (with a common HV line) were not tested above 400V.

Variation of nStrobed Channels In ABC130, charge may be instantaneously injected into any number of channels from 1 to 256. The measured gain decreases (calculated noise increases) as more channels are strobed, indicating a charge shortfall. Calculated noise is reduced by 40 ENC if 32/256 channels are strobed instead of 256/256. However this takes a long time. Unless otherwise stated, results shown here inject charge into 256/256 channels, in which case an improvement of ~40ENC can be expected.

Stability vs Time Running at 400V over 60 hours, reproducibility is generally good. The one outlier here is again H05_INN for which the localised sensor breakdown effects are not constant.

Noise Comparison: On and Off stave LH RH Noise ~15ENC higher on-stave than off-stave, but reasonably consistent.

Estimation of ENC from Noise Occupancy Trimmed for uniformity at 1fC, RC data with nStrobed =32/256 LH RH Excluded channels: H5 – 2 channels H6 - 5 channels H15 – 2 channels Ln(occ) vs Threshold2 fit to NO data gives lower noise estimate by ~80ENC

Comparison with other results from the HCC/ABC130 chipset Stave data is from RC with nStrobed = 32 @ 400V bias (consistent with other points) Short Strip Barrel module noise is slightly higher on-stave than off-stave, but generally consistent. Data is plotted separately for inner and outer columns against different capacitance values. (A trigger rate limitation applies on-stave due to the limited network bandwidth between the DAQ FPGA and the PC, which may be a factor here. This remains under investigation.)

Once installed into barrels, there will be overlap between staves. First Aggressor Study View from Stave Left View from Stave Right Stave in light tight bag Module Module Test Fixture Once installed into barrels, there will be overlap between staves. Module “SS2” is built using earlier FR4 hybrids. It’s DC-DC converter uses a copper plated aluminium shield identical to those on the stave. HV-MUX is not fitted. The module was placed under the stave to function as an aggressor, facing “Module 0”. In this configuration the separation between sensors is of order 1 inch. (In the final barrel structure the nearest sensor to sensor distance is of order 6mm but there is no direct overlap between powerboards and sensors of adjacent staves.)

Aggressor SS2 ON and OFF Module 0 LH RH Note that for these runs LH bias = 200V RH bias = 150V So noise higher than at 400V Insignificant Effect (13ENC). Also no localised effect upon Module 0 or aggressor module SS2 in terms of Noise Occupancy (see backup).

PP2 DC-DC As regards the supply of low voltage power to the petals and staves, two options are under consideration: Power each petal or stave directly from the service caverns with voltage clamp at PP2 Place an additional DC-DC stage, fed by 48V, directly at PP2 In the latter case, we are evaluating the use of a converter based upon a commercial chip Radiation dose at PP2 relatively low To make a quick “sanity check” I substituted the bench supply used for the RH stave side by the vendor’s evaluation board Cables presently in use have much lower impedance than the final installation, this is a first test! 30V IN 12V OUT Ad hoc connection of DC-DC Evaluation Module to power “RH” stave side

“PP2 DC-DC” vs TTi Bench PSU LH side: both runs powered by TTi RH side: RED run powered by DC-DC Note that for these runs LH bias = 200V RH bias = 150V So noise higher than at 400V No Significant Effect

Outlook Further “segmented” Short-Strip staves will follow in the coming months Modules with updated powerboards AMAC1a and integrated HV-MUX EoS with GBTx on-board A petal demonstrator will also be built This will have the full set of geometrically different hybrids, but the full set of sensors will not be available STAR chipset available 2018 HCCStar, ABCStar, (final) AMAC Staves and Petals to follow once modules become available Activities will move towards a multi-stave system test with more realistic cabling, power supplies and support structures Work with this first ABC130 stave will continue, including Connection to GBTx by means of the “ITSDAQ GBTx Test Vehicle” Population of a second non-segmented Short-Strip stave will shortly begin in the USA Using identical parts

Conclusions A partially loaded ATLAS ITk Short-Strip Stave Prototype was assembled Using non-segmented bus tapes The HV-MUX oscillator was found to be a source of noise This was quickly corrected by the addition of a single resistor to each oscillator The resistor will be incorporated in future power boards and indeed the final AMAC design The stave now performs very well No difference in performance between the two sides (with and without HV-MUX) Confirmation of expected noise vs bias and noise vs nStrobed relationships Stable results across several days First “aggressor” test has shown no ill effects Novel aspects of our chosen module and stave designs have been shown to have no ill effects in terms of noise DC-DC on-module Oscillator driven HV switch on-module (“HV-MUX”) Sensor return current monitoring in HCC Common on-stave return bus for LV and HV

BACKUP

Aggressor Noise Occupancy Stave Module 0 (facing Aggressor Module SS2), trimmed to align pedestals Aggressor Module SS2 (facing Stave Module 0), trimmed to align pedestals No localised effects. Shoulder not visible if trimmed for uniformity at 1fC (-> inferior pedestal alignment).

Aggressor SS2 ON and OFF No Significant Effect

“PP2 DC-DC” vs TTi Bench PSU No Significant Effect