ECE 3430 – Intro to Microcomputer Systems ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs Lecture #10 Agenda Today 1) Branch Instructions/Conditional Execution 2) Status register flags: N,Z,V,C 3) Compare Instructions 4) IT Instruction (If-Then, Else) Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Branch Instructions We need a way to alter the flow of program execution when specific conditions exist. This allows our programs to dynamically adjust to input. The Program Status Register provides the status of the CPU. V = Signed Overflow N = Negative Result Z = Zero Result C = Carry/Borrow START <op> <loop op> <cond> x == y? NO YES Only these flags affect behavior of conditional jump instructions <op> END Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Branch Instructions PSR[31:28] = {N,Z,C,V} - These flags are altered upon execution of an instruction if requested (S-bit). - We can use a conditional branch instruction depending on these flags to set the new value of the PC. - A branch occurs when the PC is set to different place in the code (besides the next sequential instruction). - Branches in the ARM processor always use n-bit relative addressing. This gives a finite branch distance. The forward and backward distance are always (almost) the same. - Labels provide an easy way to mark the destination of a branch. This way, the assembler can calculate the branch distance for you! - Unconditional Branch – “B(AL)” is an instruction that will always branch when executed regardless of what bits are set in the PSR. “B(AL)” is the only unconditional branch instructions in ARM instruction set. - Conditional Branch – When executed, it will check the PSR and evaluate a logical condition. If the branch condition is true, it will set the PC to the new address location. If the branch condition is false, it will increment the PC to the next instruction code as in normal operation. All branch instructions other than “B(AL)” are conditional. Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Conditional Branches (Single Flag Test) Carry Flag Branches BCC = if carry clear, C=0 BCS = if carry set, C=1 BHS = if higher or same, C=1 BLO = if lower, C=0 Zero Flag Branches BEQ = if equal to zero, Z=1 BNE = if NOT equal to zero, Z=0 Negative Flag Branches BMI = if minus, N=1 BPL = if positive or zero, N=0 Two’s Complement Overflow Branches BVS = if signed overflow, V=1 BVC = if NO signed overflow, V=0 aliases Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Conditional Branches (Multi-Flag Test) C and Z flags: > BHI: if higher (unsigned), C = 1 and Z = 0 <= BLS: if lower or same (unsigned), C = 0 or Z = 1 N and V flags: >= BGE: if greater than or equal (signed), N  V = 0, N and V equal < BLT: if less than (signed), N  V = 1, N and V not equal N, V, and Z flags: > BGT: if greater than (signed), Z = 0 and N  V = 0 <= BLE: if less than or equal (signed), Z = 1 or N  V = 1 Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Signed vs. Unsigned Branch Instructions (Summary) Symbol: Boolean Equation: (evaluates to true) Unsigned branch instructions: BHI = if higher than > (C * !Z) BHS = if higher than or the same >= C BLO = if lower than < !C BLS = if lower than or the same <= (!C + Z) Signed branch instructions: BGT = if greater than > !Z * !(N  V) BGE = if greater than or equal >= !(N  V) BLT = if less than < N  V BLE = if less than or equal <= Z + (N  V) Neither: BEQ = if equal == Z BNE = if not equal != !Z BAL = always (unconditional jump) ! : NOT 1) Take note of the number of logic levels. * : AND 2) Note the use of DeMorgan’s Law in complementary pairs. + : OR 3) Processors don’t have to implement both parts of a pair.  : exclusive OR Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

ECE 3430 – Intro to Microcomputer Systems Conditional Branches Compare Instructions CMP/CMN : General compare (compare negative) Typically, the above compare instructions should immediately precede a conditional branch instruction! If a data movement instruction uses the S-bit to adjust the condition code flags, it may not be necessary to use an explicit compare. Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

IT instruction (If-Then, Else) In pipelined architectures, it is desirable to eliminate branch instructions to keep the pipeline full. If (R0 < 100) { R0 += 1 } Else {R0 = -100} In the traditional ARM instruction set, this can be done using conditionals on each instruction. But conditional instructions aren’t allowed in Thumb. So the IT instruction comes to the rescue. CMP R0, #100 ITE LT ADDLT R0,R0,#1 MOVGE R0,#-100 Format: I**** where * can be T or E. Up to four. Each subsequent instruction in block needs to be declared conditional and agree with T or E. The IT instruction is real, subsequent instructions are encoded as unconditional. All instructions are fetched and decoded—but not necessarily executed (pipeline stays full). Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015

Using Compare Instructions to Influence Jump Instruction Behavior In-class example of N, Z, V, and C flag calculation by CMP instruction. BGE (signed) takes branch if “N  V = 0” evaluates as true. BHS (unsigned) takes branch if “C = 1” evaluates as true. What numbers can we subtract to yield: N = 1? V = 1? C = 1? Lecture #10 ECE 3430 – Intro to Microcomputer Systems Fall 2015