Update of time measurement results with the USB WaveCatcher board & Electronics for the DIRC-like TOF prototype at SLAC D.Breton , L.Burmistov,

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Presentation transcript:

Update of time measurement results with the USB WaveCatcher board & Electronics for the DIRC-like TOF prototype at SLAC D.Breton , L.Burmistov, J.Maalmi (LAL Orsay)

Introduction The goal for the Forward TOF electronics is: To measure the arrival time of a fast pulse for particle identification with an electronic precision better than 10 ps at high scale, low power and low cost Expected total time resolution : ~90 ps /√Npe- Required < 30 ps Proposed solution is based on Analog Memories and digital treatment of the digitized signal!

The WaveCatcher board The principle is to build a TDC working directly on analog pulses ! Pulsers for reflectometry applications Reference clock: 200MHz => 3.2GS/s Board has to be USB powered => power consumption < 2.5W 1.5 GHz BW amplifier. µ USB 2 analog inputs. DC Coupled. Trigger input Trigger output +5V Jack plug Trigger fast discriminators SAM Chip Dual 12-bit ADC Cyclone FPGA

Acquisition software with graphical user interface This software can be downloaded on the LAL web site at the following URL: http://electronique.lal.in2p3.fr/echanges/USBWaveCatcher/

Lab results for time distance Source: asynchronous pulse sent to the two channels with cables of different lengths. Time difference between the two pulses extracted by CFD method. Threshold determined after linear interpolation of the splined neighboring points. Spline and normalization Threshold interpolation 9.64ps rms Ratio to peak 0.23 Time 0.23 σΔt ~ 10ps rms jitter for each pulse ~ 10/√2 ~ 7 ps ! Other method used: Chi2 algorithm based on reference pulses.

Conditions : 40pe- and low gain (2-3 104) SLAC laser test 10µm MCP-PMTs: Conditions : 40pe- and low gain (2-3 104) WaveCatcher Board 100Hz Digital CFD method TARGET board

SLAC test summary Sampling period! From this we could conclude that applying a very simple algorithm, which is very simple to integrate in a FPGA  (finding a maximum & linear interpolation between two samples, i.e., without a use of the Spline fit) already gives very good results (only 10% higher than the best possible resolution limit). Summary of all the test results

Last conclusions at Annecy The USB Wave Catcher has become a nice demonstrator for the use of matrix analog memories in the field of picosecond time measurement Different methods have been studied to analyze data taken with MCP-PMTs : CFD and Chi2 algorithm give almost the same time resolution : Double pulse resolution : ~ 24 ps => Single pulse resolution: ~ 17 ps Even the simplest CFD algorithm can give a good timing resolution Single pulse resolution : ~ 18 ps it can be easily implemented inside an FPGA (our next step) => reduces the data rate => can be used for very large scale detectors

NIM paper has been submitted in April Abstract: … There is a considerable interest to develop new time-of-flight detectors using, for example, micro-channel-plate photodetectors (MCP-PMTs). The question we pose in this paper is if new waveform digitizer ASICs, such as the WaveCatcher and TARGET, operating with a sampling rate of 2-3 GSa/s can compete with 1GHz BW CFD/TDC/ADC electronics ... … Conclusion: … The fact that we found waveform digitizing electronics capable of measuring timing resolutions similar to that of the best commercially-available Ortec CDF/TAC/ADC electronics is, we believe, a very significant result. It will help to advance the TOF technique in future.

Window for time measurements

Chi2 results with the WaveCatcher Software Spline Interpolation with 3.12 ps /bin + Chi2 algorithm on the Leading Edge of the pulses (10 to 30%)

CFD results with the WaveCatcher Software Simple Digital CFD : as should be implemented in an FPGA ! Peak detection + Linear interpolation of threshold

Time Measurements with SiPMs SiPMs 1 et 9 mm² HAMAMATSU, FBK, Photonique, Sensl SiPM laser

Setup Adjustment of the number of PhotoElectrons 1st plot: with multiple pe- 2nd plot with adjustment to ~1 pe- like expected for TOF Charge Histograms Photoélectrons number SiPM 1 2 laser

Preliminary results for time measurement with SiPMs SiPM 10-50S BK4s (pixel : 50 µm) 70,55 V – 20 °C +/- 0,1 °C SiPM 10-100S BK4s (pixel : 100 µm) 71,5 V – 20 °C +/- 0,1 °C Time (ns) σ= 75,5 ps (gaussian fit) RMS= 170 ps PRELIMINARY Time (ns) σ= 54,6 ps (gaussian fit) RMS = 140 ps

Preliminary results for time measurement with MCP-PMTs MCP-PMT Burle X8512 We started studying the 25µm MCP-PMTs First runs with many photons gave: ~14 ps (rms) Then with less (?) photons: ~23 ps (rms) Still working towards the single pe-

Electronics for the DIRC-like TOF prototype at SLAC CRT D. Breton & J Electronics for the DIRC-like TOF prototype at SLAC CRT D.Breton & J.Maalmi (LAL Orsay)

Experiment setup

Main requirements for the Electronics For the two-bar test at SLAC, we have to build a synchronous sixteen channel acquisition system: The latter has to work with a common clock There we take benefit of the new external clock input of the WaveCatcher V5 It will be self-triggered but it will also be synchronized with the rest of the CRT: Event readout Event time tagging USB has to be ran at a distance of 40m => it will be based on a dedicated commercial set of two boards, interconnected by an Ethernet cable

Base PCB & cable All the lines between the MCP anodes and the cable inputs are 14.7mm long

The USB_WaveCatcher board V5 USB interface => 480Mbits/s Pulsers for reflectometry applications Reference clock: 200MHz => 3.2GS/s Board has to be USB powered => power consumption < 2.5W 1.5 GHz BW amplifier. µ USB Trigger input 2 analog inputs. DC Coupled. Clock input Trigger output +5V Jack plug Trigger fast discriminators SAM Chip Dual 12-bit ADC Cyclone FPGA

Acquisition software with graphical user interface A new version dedicated to the 16-channel acquisition is under development.

Clock and control board Electronics setup To / from trigger USB Repeater USB hub 8 16 channels MCP-PMT 36dB Amp Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in Trig out CH0 CH1 Clk in Trig in USB 36dB Amp Ext trig out Ext trig in USB USB USB USB USB USB USB USB Clk out 8 Trig out 8 Trig in 8 36dB Amp 36dB Amp 8 USB WaveCatcher V5 Clock and control board USB Repeater DAQ PC

MITEQ amplifier Model: AM-1610-1000 Input and output connector: SMA Frequency Minimum 1 MHz Frequency Max 1000 MHz Electrical Specifications Gain Minimum 36 dB Gain Flatness 0.75 dB+/- Noise Figure 3.3 dB Voltage 1 (Nominal) 15 V Current 1 (Nominal) 160 mA Impedance 50 Ohms Price: Per /1 475 Euros Per /16 425 Euros

Crate for WaveCatcher boards Recycled 6U crate Naked WaveCatchers mounted on 3U carrier boards All the cables inside the crate except the signal inputs which will be located on the front panel side

Clock and control board From WaveCatchers To WaveCatchers From CRT To CRT

Comments about electronics Baseline is to use sixteen individual 36 dB amplifiers but a solution with two boards each housing 8 amplifiers with programmable gain is under study It could be used for the second step based on the SL10 MCPs It is necesssary to test it in view of the final design Special care will be taken in the clock distribution in order to maintain the individual time performances of the WaveCatcher boards Common trigger for the WaveCatcher boards will be the OR of their individual triggers on signal This will stop the signal recording into the analog memory but readout could be validated by a second signal coming from the CRT Upon each event, the acquisition software will fetch the time in the CRT µPC => synchronization of events with the CRT’s

Targetting the final design Final design will permit readout of ~ 672 channels. We need hit charge and time Pulse width ~ 5ns => 15 samples (3,2GS/s) per hit read at ~ 20 MHz => total memory readout time of 750 ns per hit Mean hit rate of 470 kHz (~2 µs) Analog memory will have to avoid creating dead-time => integrated derandomizer? Block diagram of one channel MCPPMT Level1 trigger Amplifier Auto-triggered analog memory 2-5 GS/s ADC CFD + latency buffer (PRO ASIC 3 Actel FPGA) Control To DAQ

Conclusions We are still working on the WaveCatcher software We integrated a lot of functionnalities for time measurement The first results with SiPM tend to show that SiPM are not adapted for high precision time measurements We just started working with MCPPMT We should get our first results with MCPPMT and single pe- very soon Electronics for the DIRC-like TOF prototype is well on tracks It includes hardware and software