the Operating System (OS)

The Operating System (OS) Editor Operating System P2: Compiler P3: Doom MIPS At any one time the processor (MIPS) is only excecuting one program (process).

Our Assembler .text .data User .ktext .kdata Kernel

The Hardware .text .data User ERROR! OK .ktext .kdata Kernel

How does the User program pass control to the Operating System? Take control on ERROR Pass control explicitly

ERROR Ex, Arithmetical Overflow li $4 0x80000000 neg $4 $4 (sub $4 $0 $4) 0x00000000 - 0x80000000 0x80000000 Sign differs Same Sign ! ERROR

Signed/Unsigned Arithmetics The only difference is that Unsigned never causes ERROR Signed causes ERROR on Overflow etc. Signed ADD SUB ADDI .. Unsigned ADDU SUBU ADDIU ..

Memory Error Instruction Memory = Bad PC Data Alignment Error Access Protected Memory from User mode Nonexistent Memory (Page fault Chapter 7)

Do not confuse ! A Memory that tells the pipeline to Wait relate to “cache miss” A Memory Error or Page Fault realte to “TLB miss”

The Consequence A Memory that tells the pipeline to Wait Pipeline Stall A Memory Error or Page Fault Exception

Pass control excplicitly The User wants some service from the Operating System File I/O Graphics Sound Allocate Memory Terminate Program (no HALT instruction in real MIPS) SYSCALL (casuses an exception)

How to choose service: Is there different SYSCALLs? NO! Only one, use a register ($a0) to choose Use other registers ($a1,...) as parameters Use $v0 for result ori $a1 $r0 ‘A’ ; Char ‘A’ ori $a0 $r0 0x00 ; Write Char syscall ori $a0 $r0 0x01 ; Read Char or $a1 $r0 $v0 ; Move result $v0->$a1 ori $a0 $r0 0x00 ; Echo Char

Other ways for the Operating System to take control? External Interrupts, (not caused by User program) Timers Harddisk Graphics Sound Keyboard, Mouse, other perhipals

Coprocessor CP0 8 Bad Memory Address 12 Status Register 13 Cause Register 14 Exception Address

Status Register “Mode Stack” External Interrupt enable/disable

“Mode Stack” OLD PREVIOUS CURRENT KU IE KU IE KU IE KU IE 5 KU IE KU IE KU IE KU IE 0 Kernel Mode 1 User Mode 0 External Interrupt Disable 1 External Interrupt Enable

Exception / Interrupt Occurs OLD PREVIOUS CURRENT KU IE KU IE KU IE KU IE KU IE 0 0 KU IE 0 Kernel Mode 1 User Mode 0 External Interrupt Disable 1 External Interrupt Enable

RFE Instruction (priviliged) OLD PREVIOUS CURRENT KU IE KU IE KU IE ? ? KU IE KU IE We restore the PREVIOUS (KU,IE) into CURRENT

Resume User Program CP0 $14 Holds the Exception Address (Addr to instruction in EX stage) mfc0 $k0 $14 ; resume address jr $k0 ; $k0 kernal reg rfe ; “delayed branch”

Shared “Stack” Assume that the User program uses the stack: Can the Kernal use the same stack ($sp)? Yes, but remember never to use memory below $sp, it will be destroyed (overwritten)!! $sp Kernal Data Kernal Data $sp User Data User Data User Data User Data

External Interrupts (CPO $14) Bit 0, (Current Interrupt Enable) All External Interrupts Enable/ Disable Bit 15..10, (individual interrupt enable) 15 10 Current IE INT 5 INT 4 INT 3 INT 2 INT 1 INT 0 ............

Enable External Interrupt 2 Bit 0 = 1, (External Interrupt Enabled) Bit 12 = 1, Interrupt 2 Enabled 15 10 INT 5 INT 4 INT 3 INT 2 INT 1 INT 0 Current IE = 1 1 ............

Cause Register (CP0 $13) Bit 5..2, Exception Cause Code Bit 15..10, Interrupt Pending Bit 31, Exception Occur In Branch Slot 31 15 10 5 2 BS INT 5 INT 4 INT 3 INT 2 INT 1 INT 0 Ex 3 Ex 2 Ex 1 Ex 0 .... .... ... Pending Interrupts Exception Cause Code see Table 4.3 LSI Logic

Check if Interrupt 2 Pending Mask with bit 12 15 10 CP0 $13 INT 5 INT 4 INT 3 INT 2 INT 1 INT 0 AND 1 INT 2