fADC125 Status Cody Dickover

Slides:



Advertisements
Similar presentations
GlueX Collaboration Meeting June 3-5, GeV Trigger Electronics R. Chris Cuevas 1.Hardware Status  Production Updates 2.DAq and Trigger Testing 
Advertisements

Level-1 Trigger Commissioning H.Dong, A.Somov Jefferson Lab Trigger Workshop, Jul 8, 2010.
GlueX Collaboration Meeting October 2-4, 2014 Trigger System Update R. Chris Cuevas Trigger Hardware/Firmware Status  Hardware Status  Performance Test.
CHL -2 Level 1 Trigger System Fully Pipelined Custom ElectronicsDigitization Drift Chamber Pre-amp The GlueX experiment will utilize fully pipelined front.
GlueX Collaboration Meeting May 12-14, GeV Trigger Electronics R. Chris Cuevas Trigger Hardware/Firmware Status  Global Trigger  Installation.
Team Members Jordan Bennett Kyle Schultz Min Jae Lee Kevin Yeh.
Booster Cogging Teststand Progress Update Kiyomi Seiya, Alex Waller, Craig Drennan August 22, 2012.
1.Status update from May 2011  FADC250 and Trigger modules  Two crate testing success 2.Schedule  How about those requirements?  What’s happened since.
23 July, 2003Curtis A. Meyer1 Milestones and Manpower Curtis A. Meyer.
GEM Electronic System Status New releases of electronic boards: ◦ MPD v 4.0 ◦ Backplane 5 slot short (for UVa design) ◦ APV Front-End with Panasonic connector.
Global Trigger H. Bergauer, K. Kastner, S. Kostner, A. Nentchev, B. Neuherz, N. Neumeister, M. Padrta, P. Porth, H. Rohringer, H. Sakulin, J. Strauss,
 Brief status update of DAQ/Trigger production hardware  Firmware development for HPS application  CLAS12 CTP ‘upgrade’ notes  Summary Status of the.
Writing Your Own Custom IP Drivers for the IOC Blade 9010 By Darrell Nineham 5 Craddock.
GlueX Collaboration Meeting February , GeV Trigger Electronics R. Chris Cuevas Hardware Status ( A top down view,, )  Global Trigger Processing.
Hall A DAQ status and upgrade plans Alexandre Camsonne Hall A Jefferson Laboratory Hall A collaboration meeting June 10 th 2011.
CSE 598A Project Proposal James Yockey
Detectors and read-out DetectorNo. of ch.Read-out method Device candidates CsI(Tl)768Flash ADCCOPPER + 65 MHz FADC FINESSE Active Polarimeter600 x 12 x.
FADC progress in Vienna Reported by H.Ishino for Vienna FADC group M.Pernicka and H.Steininger.
Hall D Online Meeting 28 March 2008 Fast Electronics R. Chris Cuevas Group Leader Jefferson Lab Experimental Nuclear Physics Division System Engineering.
Hall D Online Meeting 27 June 2008 Fast Electronics R. Chris Cuevas Jefferson Lab Experimental Nuclear Physics Division 12 GeV Trigger System Status Update.
Global Trigger H. Bergauer, Ch. Deldicque, J. Erö, K. Kastner, S. Kostner, A. Nentchev, B. Neuherz, N. Neumeister, M. Padrta, P. Porth, H. Rohringer, H.
Renesas Electronics Corporation © 2010 Renesas Electronics America Inc. All rights reserved. RX 12 Bit Analog-to-Digital Converter A Rev /1/10.
CSC ME1/1 Upgrade Status of Electronics Design Mikhail Matveev Rice University March 28, 2012.
Alexei SemenovGeneric Digitizer Generic Digitizer 10MHZ 16 bit 6U VME Board.
John Coughlan Tracker Week October FED Status Production Status Acceptance Testing.
AAVS processing: Uniboard implementation. UNIBOARD Jive led FP7 project UniBoard, high integration density >> processing / m3
12GeV Trigger Workshop Christopher Newport University 8 July 2009 R. Chris Cuevas Welcome! Workshop goals: 1.Review  Trigger requirements  Present hardware.
MOLLER DAQ Aug 2015 meeting Team : R. Michaels, P. M. King, M. Gericke, K. Kumar R. Michaels, MOLLER Meeting, Aug, 2015.
1 AFE IIt/VLSB Update Terry Hart, MICE Tracker Phone Conference September 5, 2007.
DOM MB Test Results at LBNL Main Board Readiness Status Review LBNL, July 2003 Azriel Goldschmidt.
AIDA FEE64 production report January 2011 Manufacturing Power Supply FEE64 revision A “3 hour test” 19th January
SKIROC ADC measurements and cyclic ADC LPC Clermont-Ferrand Laurent ROYER, Samuel MANEN Calice/Eudet electronic meeting Orsay June.
HPS TDAQ Review Sergey Boyarinov, Ben Raydo JLAB June 18, 2014.
Electronics Workshop GlueX Collaboration Meeting 28 March 2007 Fast Electronics R. Chris Cuevas Group Leader Jefferson Lab Physics Division Topics: Review.
FEE Electronics progress PCB layout progress VHDL progress in TBU Prototype fixture for software 9th June 2009.
DCS meeting - CERN June 17, 2002V.Kouchpil SDD DCS status Low Voltage system End-ladder ASIC High Voltage system Cooling system Schedule.
Rutherford Appleton Laboratory September 1999Fifth Workshop on Electronics for LHC Presented by S. Quinton.
Electronics Status New DCM daughter card works. –Three cards has been assembled. –One daughter card has been send to Jamie yesterday by FedEx overnight.
DAQ ELECTRONICS 18 March 2015MEG Collaboration Meeting, Tokyo Stefan Ritt.
DAQ and Trigger for HPS run Sergey Boyarinov JLAB July 11, Requirements and available test results 2. DAQ status 3. Trigger system status and upgrades.
Krzysztof Czuba, ISE, Warsaw ATCA - LLRF project review, DESY, Dec , XFEL The European X-Ray Laser Project X-Ray Free-Electron Laser Master Oscillator.
Digital Acquisition: State of the Art and future prospects
Chip Config & Drivers – Required Drivers:
DAQ ACQUISITION FOR THE dE/dX DETECTOR
Status of DHP prototypes
DAQ (i.e electronics) R&D status in Canada
DCH FEE STATUS Level 1 Triggered Data Flow FEE Implementation &
Test Boards Design for LTDB
ALICE INDUSTRIAL AWARD for its collaboration to the ALTRO Chip
Jinfan Chang Experimental Physics Center , IHEP Feb 18 , 2011
ABC130: DAQ Hardware Status Matt Warren et al. Valencia 3 Feb 2014
High speed 12 bits Pipelined ADC proposal for the Ecal
Iwaki System Readout Board User’s Guide
96-channel, 10-bit, 20 MSPS ADC board with Gb Ethernet optical output
New 500 MSa/s 12 bit FADC in VME Sangyeol Kim Notice Co., Ltd.
A New Clock Distribution/Topology Processor Module for KOTO (CDT)
The WaveDAQ System for the MEG II Upgrade
The University of Chicago
GlueX Flash ADCs 3425 PMT channels Forward, Barrel Calorimeters
JLAB Front-end and Trigger Electronics
Pierluigi Paolucci - I.N.F.N. Naples
University of California Los Angeles
Commodity Flash ADC-FPGA Based Electronics for an
CLAS12 Timing Calibration
BESIII EMC electronics
FEE Electronics progress
The CMS Tracking Readout and Front End Driver Testing
HallD Collaboration Meeting Jefferson Lab December 11-13, 2003
Implementation of nBLM algorithms on IOxOS IFC 1410
Presented by T. Suomijärvi
Presentation transcript:

fADC125 Status Cody Dickover Procurement Testing Firmware Future work Hall D Collaboration June 3rd, 2013

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB) Production Status Currently in Production 175 out of 217 received (~80%) 45 delivered Friday 5/31/2013 Working with QA on manufacturing issues Final delivery due 6/14/2013

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB) Production Issues First articles 40 first articles ~30% failure rate Main issues related to “mixed” board Full Production MTEQ hired contractor to aid QA Down to ~13% failure rate (~70 units) Weekly conference calls

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB) Testing Status 118 units tested (~54%) Working RMA’s with MTEQ QA Single board tests ongoing Full crate testing begun Temperature probe Noise histogram Thanks to Ed J.

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB) Some temperature data Fan speed 3000 RPM Temp Celcius Probe location ADCs Slot 2 MEZZ SW Slot 4 Slot 8 Slot 10 Sensor Power On 1 47 48.38 63 60.63 47.5 46.81 53.8 49.13 2 51.7 49.63 60.7 59.31 50.3 46 52.5 49.88 3 47.8 52.7 48.7 4 42.9 43.9 42.6 34.7 MAIN 54.9 53.38 58.4 58.56 46.94 55.2 52.13 53.81 59.56 43 46.88 50.8 52.69 45.3 49.9 41.7 45 33.4 34.6 34.4 OL

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB) Noise Histogram Sample of 2000 point waveform capture 12 bit Open input, midscale offset RMS for these 3 CH: 0.47, 0.46, 0.51 Prototype RMS ~0.52

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB) Firmware development Testing_v1 currently in trial w/new interface Integrated some new features from test bed Clock select, trigger select, unique ID 3 boards sent to Naomi J. at CMU for work on front end algorithms New “official release” still in progress New driver, thanks to Bryan Moffit

Future work Continue firmware integration, update register maps Continue full crate testing, low level DC check Data formatting Develop infrastructure and eventually algorithms (in collab with CDC/FDC groups) for onboard signal processing

Questions / Comments?