Final Project 6 Submission Put following files into (LastName, FirstName)_(LastName, FirstName)_finalproject.zip summary.xlsx super_hash_processor.sv transcript.txt message.txt super_hash_processor.flow.rpt super_hash_processor.sta.rpt Submit by 11:59 pm Tue 6/13, BUT don’t submit before 8 am Tue 6/13.

summary.xlsx See summary.xlsx template provided If you worked alone, just fill out one row If you just have one set of results, write “same” for “MIN AREA*DELAY DESIGN” Spreadsheet already contains calculation fields: e.g. Area = #ALUTs + #Registers. Please use them. Make sure to use Arria II GX EP2AGX45DF29I5 device Make sure to use Fmax for Slow 900mV 100C Model Make sure to use FINAL TOTAL NUMBER OF CYCLES

super_hash_processor.sv If you have two designs, name the second source code file super_hash_processor2.sv.

transcript.txt Copy of the ModelSim simulation results. Just need simulation results for tb_final_shp.sv. After you run the “run –all” command, you can save your transcript by going to the “File” menu and clicking on “save transcript as”. Transcript file will contain the history of all commands used in the current modelsim session. You can clear the current transcript by going to the “Transcript” menu on the GUI and clicking “Clear”. Use FINAL TOTAL NUMBER OF CYCLES for your cycle count. If you have two designs, name the second source transcript file transcript2.txt.

message.txt Copy of the Quartus compilation messages. You can save the messages by “right-clicking” the message window and choosing “save message” IMPORTANT: Make sure that are no warnings about “latches” or “inferred latches”. If you have two designs or two synthesis results, name the second source message file message2.txt.

super_hash_processor.flow.rpt Copy of the flow report with area numbers. Make sure to use Arria II GX EP2AGX45DF29I5 device IMPORTANT: Make sure Total block memory bits is 0. If you have two designs or two synthesis results, name the second source flow rpt super_hash_processor2.flow.rpt.

super_hash_processor.sta.rpt Copy of the sta (static timing analysis) report. Make sure to use Fmax for Slow 900mV 100C Model IMPORTANT: Make sure “clk” is the ONLY clock. If you have two designs or two synthesis results, name the second source flow rpt super_hash_processor2.sta.rpt