GPIO General Purpose Input/output Tiva C TM4C123GH6PM James Boswell Gary O’Day Michael Whatley

General Information 6 GPIO ports (A,B,C,D,E, and F) combine to offer up to 43 GPIOS (depending on configuration) Multiplexing allows pins to be used as GPIO or one of several alternate peripheral functions. Commit control protection is provided to the JTAG/SWD (pins PC[3:0]) and non maskable interrupt pins (PD7 and PF0). GPIO Pin states retained during hibernation mode Digital inputs are Schmitt- triggered Programmable control for GPIO pad configuration pull up or pull down resistor 2,4, or 8 mA drive Up to four pads can sink 18 mA for high current applications

Alternate Function Table Part 1

Alternate Function Table Part 2

GPIO Initialization General Process

Methods of Configuration Direct Register method peripherals are programmed by directly accessing memory addresses . Software driver method The software Driver model utilizes the TivaWare™ Peripheral Driver Library. Pinmux Utility Graphical user interface use to configure GPIO multiplexing

Direct Register Access Model The header file, “TM4C123GH6M.h” contains all of the definitions for assigning port variables to the physical memory locations. variable names begin with the module name and number (GPIO_PORTF) followed by register name as presented in data sheet. for example, the DIR (direction) register combined with the GPIO_PORTF would result in the variable GPIO_PORTF_DIR_R. Values that end in _R are used to access the value of a register Values that end in _M represent the mask for a multi-bit field in a register Values that end in _S represent the number of bits to shift a value in order to align it with a multi-bit field.

Direct Register Access Method Example Header Files Located Here

Software Driver Model The Library contains pre defined functions or APIs (Application Programming Interface)for configuring peripherals. Header Files Located Here

Partial List of GPIO APIs Complete List Found in TivaWare Peripheral Driver Library Manual (link provided in reference section).

PinMux Utility Graphical user interface use to configure GPIO multiplexing Built in protection for collision control Protection for JTAG pins Automatically generates c source and header files

PinMux Utility continued

Questions ?

References http://www.ti.com/lit/ug/spmu296/spmu296.pdf http://users.ece.utexas.edu/~valvano/Volume1/tm4c123gh6pm.pdf http://www.ti.com/lit/ug/spmu298a/spmu298a.pdf http://users.ece.utexas.edu/~valvano/Volume1/tm4c123gh6pm.h Fall 2014 presentation by Raul Cabrera, Khaldon Batnij, Isaac Zavala