IR detector for demonstrator and Readout A. Castera, S. Gardien,C. Girerd,H. Mathez, G. Smadja IPNL/Université Cl. Bernard/IN2P3 FRANCE

IR Detector Readout IR detector performance in the SNAP context Tests H1RG Electronic Readout Connections:tests Schedule November 15 & 16, 2005 Votre Nom

SNAP spectrograph context Low Photon fluxes at z>1: 1.5g/m2/s z=1.5 Divided into 50-100 spectral bins H1RG detector bought from Rockwell by IN2P3 Efficiency of detector Leakage current (Poisson fluctuations) Readout Noise : 22 exposures (1000s) at z = 1.5 longer expo? Sensitivity to ultimate performance reached by detector/readout Optimize non destructive readout scheme November 15 & 16, 2005 Votre Nom

IR Detector specifications Substrate/Size HgCdTe/1Kx1K Comments Operating temperature 140 K Investigate 100-140 Quantum Efficiency >60% Critical Readout Noise ~5e ~Critical Dark current < 0.03e/s Well Depth 100 000 e Linearity Exposure time 1000s 1/f contribution? 1500s? November 15 & 16, 2005 Votre Nom

IR Detector Actual (2.5µm) November 15 & 16, 2005 Votre Nom

IR Readout specifications Monitor Noise and leakage current: System noise ~ 1e Dynamic range >100 000 (Check linearity) Check frequency behaviour >1 MHz* Different gains needed for Noise monitoring /Full range Software assistance available * To reduce the readout noise for low signals by multiple readouts (?) November 15 & 16, 2005 Votre Nom

Non destructive ramp readout Measurements are correlated Decrease with Nb Readouts limited by 1/f noise November 15 & 16, 2005 Votre Nom

Goals of tests Check H1RG and readout performance Detector properties at several wavelengths: 0.85,1.30,1.45,1.65 µm (in view of future photometric and PSF measurements) Produce Maps of Noise,QE,Gain,Leakage current Investigate 1/f noise in long exposures Investigate multiple readouts and optimize Transfer working acquisition system to LAM for Spectrograph tests end June 2006 November 15 & 16, 2005 Votre Nom

H1RG readout system (Lyon) Motherboard specific to H1RG (ADC,Ampli,Dac) Mezzanine with µprocessor+FPGA (from OPERA exp) Clock rate up to 5 MHz Amplifier 1nV/sqrt(Hz)>100Hz (Dn~ 1-10MHz) (AD797, Gain~5 to 10, ENC~ 0.3-1e) 16 bit ADC 38µV/step (input gain GADC = 1-10) (SPT8100,Fairchild, H1RG = 3µV/e ) Noise sensitivity ~ 1.6 electrons/digit (with GADC = 8 ) Dynamic range for this gain: 100000 e November 15 & 16, 2005 Votre Nom

Mezzanine µprocessor card November 15 & 16, 2005 Votre Nom

Scheme of Motherboard Dacs, ADC, etc…, clocking up to 5 MHZ + subsampling Layout is completed November 15 & 16, 2005 Votre Nom

Readout Cards Schedule Motherboard layout completed End November 2005 Mezzanine card available: End November 2005 Mezzanine Software (FPGA, µprocessor) Mid January 2006 Motherboard delivered Mid December 2005 Tests of readout of Motherboard done Mid -February 2006 Test bare mux February 2006 November 15 & 16, 2005 Votre Nom

Slow control functionalities + connections Connect H1RG Hirose Kapton Single flex board, no connector to outside 92 pins H1RG+ slow controls 1 19 pin connector (analog signals) 5 x27 pin throughput (digital + controls) Temperature monitoring : thermistances Resistors for temperature control (level and stability) Light diodes at selected wavelength Photodiodes: monitoring of illumination November 15 & 16, 2005 Votre Nom

Connecting Card LED Digital througputs H1RG detector Supporting pilars Optical references Vessel Throughput (Analog out) photodiodes Thermistances+resistors+ Connectors NOT shown Kapton from H1RG November 15 & 16, 2005 Votre Nom

Connecting Card and environment Fiberglass throughputs (intermediate cooling) Fiberglass thermal damping Cold plate Cold plate +connection card+detector to be moved to LAM November 15 & 16, 2005 Votre Nom

Connecting Card schedule Complete layout of connecting card : End November 2005 Connection from card to outside via FLEX Strip assignment of flex completed: November 11th Order placed: November 18th Readout system ready : Mid February 2006 Bare Multiplexer tested : End February 2006 Test cryostat needed : February 2006 November 15 & 16, 2005 Votre Nom

Conclusion Test programme foreseen at Lyon (February to July 2006) Optimize readout settings (noise,dynamic range,ref pixel subtraction) Map detector at different temperatures and Wavelengths (leakage current,gain,efficiency,noise) Investigate behaviour during long exposures Test ultrashort exposures/partial reset intrapixel homogeneity (if time….) November 15 & 16, 2005 Votre Nom