Lab 4 Application of RTOS

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Presentation transcript:

Lab 4 Application of RTOS 11. Use FFT to Design DF Lab 4 Application of RTOS Input sound, analog filter Digital filter, FFT Display amplitude versus freq on the oLED Reference EE345L book, chapter 15 July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Jonathan Valvano EE345M/EE380L.6 Lab4 Spectrum Analyzer July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Design a linear FIR digital filter Specify gain versus frequency Specify phase versus frequency y(n) x(n) July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Fast Fourier Transform (FFT) FFT is a faster version of the Discrete Fourier Transform (DFT) FFT spectrum of a cosine, which has a frequency of 0.1 Fs Fs = 10000 Hz Cosine freq = 1000 Hz Region interested in from 0 to Fs/2 (symmetric about Fs/2) July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Jonathan Valvano EE345M/EE380L.6 FIR digital filter Y(z) = H(z) X(z) h(n) = IFFT {H(z)} Convolution y(n) = h(n)*x(n) Constants h0, h1, ... hN-1 y(n) = h0·x(n)+h1·x(n-1)+ ... +hN-1·x(n-(N-1)) N multiplies, N-1 additions per sample July 5, 2018 Jonathan Valvano EE345M/EE380L.6

How to choose sampling rate Nyquist Rate Limitation of display Limitation of processor Limitation of RAM Limitation of human eyes and ears Limitation of communication channel July 5, 2018 Jonathan Valvano EE345M/EE380L.6

How to choose number of samples Frequency resolution = fs/N Increase in N results in better frequency resolution However, increase in N leads to a bigger MACQ buffer and more multiplies and additions Does not need to be a power of 2 DFT calculated once, off line July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Jonathan Valvano EE345M/EE380L.6 Design process (1) Specify desired gain and phase, 0 to ½ fs k goes from 0 to N/2 (f = k fs/N) H(k) is complex |H(k)| is gain angle(H(k)) is phase For ½ fs to fs H(N-k) is complex conjugate of H(k) Poles and zeros are in complex conjugate pairs July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Jonathan Valvano EE345M/EE380L.6 Design process (2) Take IDFT of H(k) to yield h(n) n goes from 0 to N-1 h(n) will be real, because H(k) symmetric The digital filter is y(n) = h0·x(n)+h1·x(n-1)+ ... +hN-1·x(n-(N-1)) July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Binary Fixed point notation Q formats Qn Number (16 bit) n: specifies no of bits used for precision 16-n: no of bits used for Range Eg: 96.450 (unsigned number) - What Qn? How is this number stored as an integer? July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Example Open FIRdesign51.xls Change sampling rate to 10,000 Hz Adjust red desired gain to make BPF Pass 2 to 4 kHz Look at sharp corner versus round corner Notice linear phase Copy 51 coefficients into software

2k to 4k BPF

FIR Filter SW design short Filter(short data){unsigned int k; const long h[51]={-3,-9,4,5,0,17,5,-20,-5,-7,-22, 24,41,-8,2,1,-74,-31,71,20,33,125,-119,-350,67, 462,67,-350,-119,125,33,20,71,-31,-74,1,2,-8,41, 24,-22,-7,-5,-20,5,17,0,5,4,-9,-3}; static unsigned int n=50; // 51,52,… 101 short Filter(short data){unsigned int k; static short x[102]; // this MACQ needs twice short y; n++; if(n==102) n=51; x[n] = x[n-51] = data; // two copies of new data y = 0; for(k=0;k<51;k++){ y = y + h[k]*x[n-k]; // convolution } y = y/256; // fixed point return y;

Jonathan Valvano EE345M/EE380L.6 Circular Buffering Source: “Communication system design using DSP algorithms” by Steven A. Tretter (chapter 3, page 73) July 5, 2018 Jonathan Valvano EE345M/EE380L.6

Optimization Pointer implementations of MACQ faster Do not try and shift the data Convolution x[n]*h[n] takes N multiplies, N-1 additions per sample Can be optimized to N/2 multiplies Coefficients are symmetric Assembly optimization with MLA Multiply with accumulate