Li HAN, Sam Huh, and Neal H. Clinthorne

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Presentation transcript:

A VLSI Design for Energy Extraction and Pileup Prevention for High Count-Rate Scintillation Signals Li HAN, Sam Huh, and Neal H. Clinthorne University of Michigan, Ann Arbor, MI, USA -ADD WATCHDOG TO THIS SYSTEM ARCHITECTURE -BOLDFACE AND MAXIMIZE TEXT SIZE (USE ARIAL FONT) Eq.(6) Digital PPE uses shifter and look-up-table to calculate energy I. Goal and Design Rationale Design a Very Large Scale Integration (VLSI) full digital processor to recover photon energy deposited in a NaI scintillation detector for high event rates where multiple scintillation pulses overlap. Digital solutions offer more flexibility and higher noise immunity than digital-analog hybrid active pileup prevention energy (PPE) circuits. The full digital PPE algorithm and circuit design not only increases working frequency up to 400MHz, but also avoids floating point multiplication, which could be implemented by the Application Specific Integrated Circuit (ASIC) procedure or Field Programmable Gate Arrays (FPGA) chip. The layout of the chip has been implemented using the method of ASIC design flow with the TSMC 0.18um standard cell CMOS technology on CAD system. III. PPE-CHIP Architecture II. Methods and Algorithms Fig.2 PPE-CHIP Architecture and Features The active pileup prevention energy (PPE) method:1 Integrate the present event dynamically until the next is detected. Estimate a weighted-value to represent the total energy inside the scintillation detector which includes both the energy from present event and the remnant energy from all the previous events Calculate the energy of the latest event by subtracting the residual energy, i.e. a decay-weighted sum of the previous total energy based on the present total energy Fig.3 Pipelined Energy Extractor with Look up Table Fig.1 The full digital PPE Technology acquired data from 100MHz A/D converter, sampled from NaI scintillation detector (τ = 230ns) at at every 10ns (Ts). Eq.(1) Sampled Data at point n for non-pileup events Eq.(2) Sampled Data at point n for pileup events Fig.4 PPE-CHIP Internal Structure and Virtuoso CAD Layout Eq.(3) The discrete weighted sum Sj and Sj-1 for the jth, (j-1)th gamma ray IV. Experimental Results Eq.(4) Variable SEj is 10 times less then Sj Fig. 5 Comparison of Dynamic and Conventional Fixed Threshold Eq.(5) Extract the total energy Ej for the jth pileup gamma ray Fig. 6 Comparison of Energy Spectra at Different Count Rates and Different Methods ,i.e. D-PPE (l), DLC (m), DI (r) 1Wong, W-H., et al. IEEE Trans. Nucl. Sci, 45(3):898–902, 1998 Contact: Li HAN (lhan@umich.edu)