Recommendations for Isolation Monitor Ground Fault Detectors on Residential and Utility-Scale PV Systems Jack Flicker Jay Johnson Mark Albers Greg Ball

Ground Fault Detection Options Solar ABCs steering committee investigated ground faults and the detection blind spot Concluded that fuse-based GFDI designs vulnerable to faults in the grounded current-carrying conductor GFDI fuse impedance decreases detection window for all faults Number of alternatives identified Current Sense Monitor (CSM) Residual Current Detection (RCD) Isolation Resistance Monitor (Riso) Also called “Morning Check”

Riso Research Goals and Findings Current Riso standards vary widely from extremely conservative (UL 1741 CRD 2010) to very liberal (UL 1741 CRD 2012) Standards take into account array/inverter V, but not module/inverter isolation Project Goal Find Riso thresholds to: maximize the number of ground faults that are detected minimize unwanted tripping Balance unwanted tripping with safety Appropriate trip point can be picked for given maximum fault power Need knowledge of the array Finding There is no a priori one-size fits all solution to completely fulfill both safety and unwanted tripping concerns It may be necessary to go to a range of values  Part of commissioning process?

Isolation Resistance (Riso) V I Inject voltage pulse (~50 V) using an external power source isolation calculated from current draw + - Rfault Rmod Rinv Vpulse If Riso < threshold (kW) isolation monitor trips x x Riso measurements on ungrounded systems grounded systems which temporarily unground continuous monitoring possible by superimposed Vpulse on nominal DC bus Often before the inverter begins to export power “morning check”

Isolation Resistance (Riso) V I Rmod modeled as S*M resistor array of single module leakage (Rleak) S = # strings M = modules/string Parasitic pathway to ground via inverter or other BOS components ~1 MW for residential systems 100’s of kW for utility systems some measured as low as 20 kW (!!) Riso modeled as equivalent resistance of parallel resistors + - Rfault Rmod Vpulse x x

Riso Model Riso modeled as S*M resistor array S = # strings M = modules/string Slight deviations due to voltage drops across parasitic resistors, bypass diodes, and/or module photodiodes Validated by measurements on 750 and 3 kW systems (more information in proceedings) Riso dominated by REGC Riso dominated by Rfault Riso dominated by Leakage (module and inverter) 6 J. D. Flicker, and J. Johnson. “Electrical Simulations of Series and Parallel PV Arc-Faults” Proceedings Photovoltaics Specialists Conference (PVSC), pp 3165-3172, 2013.

Riso Models Ungrounded Arrays Grounded Arrays Worst-case In general, the fault current is not analytically solvable Luckily for us, the worst case scenario (fault at a current carrying conductor) has analytical form Ungrounded Arrays Adrian Haering Grounded Arrays I Rfault Rinv Ifault I-Ifault Relatively low current for high Riso values because of “clamping” effect Ungrounded array ceases to float and becomes referenced to ground turns into grounded array Inverter Acts as Current Divider Worst-case Rinv << Rfault

Riso Models Fault Current Ungrounded Arrays Grounded Arrays Fault Power Grounded arrays provide significantly more fault current Dump much more power into fault  Significantly more dangerous Will consider grounded array with fault on the current carrying conductor to be the worst case

Riso Trip Point Recommendations We have developed equations that predict fault current as a function of Rfault How does this translate to Riso trip point? Start with allowable energy #1 Divide by Voc to get allowable Ifault trip times #2 Use Ifault equation to get allowable Rfault Need system Voc ~14.5 kW for 70 W Pmax Voc=1000 V Imp=2089 A Rmp=0.34 W

Riso Trip Point Recommendations Use Riso equation to get trip point Need system information # strings, # modules in string, Module isolation, Inverter isolation Riso = 5.66 kW S,M are well known according to system design (S=100, M=10) Conservative Rleak value would be minimum IEC value (40 MWm2) Inverter isolation can vary widely, conservative value 20 kW

Riso Trip Point Recommendations Use Riso equation to get trip point But what if we don’t have system information…such as an inverter manufacturer? IEC Minimum Isolation = 40 MWm2 Measured or Assume worst-case 15 kW ?? 2 Assume worst-case 5% ??

Riso Trip Point Recommendations Allows us derive an Riso trip threshold vs. system size for maximum allowable fault power dissipation (Pfault) Riso has a dependence on system size (Pinv)  find Riso trip points vs. system size Assume worst case= leakiest modules/inverter? Rleak = 40 MWm2, Rinv = 15kW, h = 5%, Voc = 1000 V What if someone puts on better modules? Rleak = 20 MWm2, Rinv = 15kW h = 20%, Voc = 1000 V More overhead  less unwanted tripping But Riso trip point  unsafe condition (Pfault > 70 W) What if you assume worst case  least leaky modules/inverter? Riso ≈ Rfault Safe if installer puts on leaky modules/inverter, but unwanted tripping issues

Riso Trip Point Recommendations Current Riso standards vary widely from extremely conservative (UL 1741 CRD 2010) at 100 kW to very liberal (UL 1741 CRD 2012) at 700 W for a 30 kW system Take into account array/inverter V, but not module/inverter isolation h = 5% Inverter isolation = 15 kW PDC/PAC = 1 Voc = 1000 V Appropriate trip times for array size can be altered according to what the appetite for maximum fault power is But to truly balance unwanted tripping with safety you have to have some knowledge of the array and there is NO a priori one-size fits all solution to completely fulfill both safety and unwanted tripping concerns It may be necessary to go to a range of values which can be chosen by array operator