Instrument Control Systems 2014 NGC Detector Control Software Base Software, Infrared Systems and AO-NGC J. Stegmeier

NGC - Detector Control Software Overview Configuration Startup Procedure Controller Programming Data Interface Version Control & Patching Tools Device Check Tool Data Cube Player FAQ All about “Chopping…”

OS, ICS, RTD, BOB, ARCHIVER, … NGC Systems Overview PC/LINUX IWS VLTSW OS, ICS, RTD, BOB, ARCHIVER, … PC/LINUX AONGC PCIe LLCU SPARTA NGC DCS/AO Driver DMA, COM NGC DCS/IR NGC OPT NGC DCS/IR NGC DCS/IR Serial FPDP CCD220 RMN / VLTI PC/LINUX PC/LINUX PC/LINUX PC/LINUX NGC DFE PCIe LLCU NGC DFE PCIe LLCU SPARTA LLCU NGC DFE PCIe LLCU NGC DCS/- Driver DMA, COM Driver DMA, COM Driver DMA, COM Driver DMA, COM RMN IFC PCIe NGC PMC Serial FPDP NGC DFE LCU MVME6100/VxWorks

For System- and Network-Administrators The same user account is needed on the instrument workstation and on the detector workstation (LLCU). The user must be able to execute a remote shell (rsh) from the instrument workstation on the detector workstation. Example: “rsh <LLCU-hostname> which ngcbExecSrv” Then verify that you get the path which you expect: /vlt/VLT2014/CCSLite/bin/ngcbExecSrv or something like /introot/<your name>/bin/ngcbExecSrv No $INS_ROOT is needed on the detector workstation. The NGC PCIe device driver needs to be installed only on the detector workstation.

Configuration Files Clock-Patterns (.clk) Control Server Server Command Line Options Detector Configuration (.dcf) Seq.-Programs (.seq) Voltages (.v) System Configuration (.cfg) Server Startup Configuration (xxdcfgStartup.cfg) Startup Configuration Sets (xxdcfgCONFIG.cfg) Specifies… Executes… Reads… IR-Applications Name (e.g. “IRDIS_NGC”) Acquisition Process

Startup Procedure Startup tools: ngcdcsStartServer <configuration-set name> [-gui] [other options] ngcdcsStopServer <configuration-set name> ngcdcsStartGui <configuration-set name> (only GUI) [other options] for maintenance (verbose mode etc.) or for overriding the keywords defined in the startup-configuration-set. The control server startup configuration is described by a unique name (configuration-set name). The <name> refers to the name of a startup-configuration-set. The startup-configuration-sets are defined in the main configuration file: $INS_ROOT/SYSTEM/COMMON/CONFIGFILES/xxdcfgCONFIG.cfg The startup-configuration-set describes the startup-configuration-file and some administrative options: CONFIG.SET1.NAME "KMDCS"; CONFIG.SET1.DICT "NGCCON"; CONFIG.SET1.FILE1 "kmdcfg.cfg"; CONFIG.SET1.PERM1 664; # all CONFIG.SET1.BACKUP T; CONFIG.SET1.LOG T; The startup-configuration-file defines the control server startup-options - e.g. auto-online, auto-start, database-point, server instance and the controller electronics system configuration file to be loaded at startup.

Startup Procedure Startup-Configuration-File: # Control server name DET.CON.SERVER "ngcdcsEvh"; # Database point DET.CON.DATABASE "ngcdcs"; # Instance label for server and OLDB DET.CON.INSTANCE "myInst”"; # HW system configuration file DET.CON.SYSCFG "NGCIRSW/myNGC.cfg"; # Startup mode (NORMAL, HW-SIM, LCU-SIM) DET.CON.OPMODE "HW-SIM"; # Go online after start DET.CON.AUTONLIN F; # Auto-start at online DET.CON.AUTOSTRT F; # Enable sub-system status polling DET.CON.POLL T; # Detector system index (DETi.XXX) DET.CON.DETIDX 1; # Dictionaries to load for this detector system DET.CON.DICT "NGCDCS"; # GUI name DET.CON.GUI "ngcgui";

System Configuration Short-Fits format (keyword based). Keyword values can be read from environment variables (e.g. $HOST, $RTAPENV, $NGCPP_HOST, $NGCPP_DATA) The system-configuration-file describes the physical NGC system architecture. Defines the interfaces (PCI-boards). Defines the modules in the system (Sequencer, CLDC, ADC, Shutter, Preamplifier, AO-Camera-Head). Defines the default setup for all modules (e.g. number of clocks, auto-enable, number of ADC channels, …). IR- and AO-systems define a detector-configuration-file which contains the information how the NGC system is used: CHIP-data (name, dimension, pixel size, gain, …) Voltage-configurations and clock-pattern definitions Read-out modes: Sequencer program to be uploaded Acquisition process to be launched Set of parameter values to be applied when the mode is selected

System Configuration (Example) # Device description DET.DEV1.NAME "/dev/ngc0_com"; # associated device name DET.DEV1.HOST "$NGCPP_HOST"; # host where interface resides DET.DEV1.TYPE "socket"; # interface instance type DET.DEV2.NAME "/dev/ngc1_com"; # associated device name DET.DEV2.HOST "$NGCPP_HOST"; # host where interface resides DET.DEV2.ENV "socket"; # interface instance type # CLDC modules DET.CLDC1.DEVIDX 1; # associated device index DET.CLDC1.ROUTE "2"; # route to module DET.CLDC1.AUTOENA "T"; # auto-enable at online DET.CLDC1.MARGIN 0.2; # margin for voltage check (in volts) DET.CLDC1.DCGN 2.0; # bias gain DET.CLDC1.CLKGN 1.0; # clock gain DET.CLDC2.DEVIDX 2; # associated device index DET.CLDC2.ROUTE "2"; # route to module DET.CLDC2.AUTOENA "T"; # auto-enable at online # Sequencers DET.SEQ1.DEVIDX 1; # associated device index DET.SEQ1.ROUTE "2"; # route to module  # ADC modules DET.ADC1.DEVIDX 1; # associated device index DET.ADC1.ROUTE "2"; # route to module DET.ADC1.NUM 4; # number of enabled ADC units on board DET.ADC1.BITPIX 16; # number of bits per pixel DET.ADC1.FIRST "T"; # first in chain DET.ADC1.PKTCNT 1; # packet routing length (# of packets from down-link) DET.ADC2.DEVIDX 1; # associated device index DET.ADC2.ROUTE "5,2"; # route to module DET.ADC2.NUM 32; # number of enabled ADC units on board DET.ADC2.BITPIX 16; # number of bits per pixel DET.ADC2.FIRST "F"; # first in chain DET.ADC2.PKTCNT 0; # packet routing length (# of packets from down-link)

Controller Programming The detector voltages are defined in a voltage configuration file in Short-FITS format (xxx.v). The voltage configuration files can be loaded to any CLDC instance in the system. Clock-Pattern blocks can be defined both in ASCII-Format (xxx.clk) and in a Binary Format (xxx.bclk, output of the Graphical Editing Tool BlueWave). The formats can be converted automatically. Synchronization with external events (e.g. trigger) can be done after any state in any clock-pattern block. A Sequencer Programming Language has been defined to make maximum use of the HW capabilities. There may be multiple sequencer instances within one detector front end system.

Detector Voltage Setup # Offsets: DET.CLDC.CLKOFF 10.0; # Global clock voltage offset DET.CLDC.DCOFF 10.0; # Global DC voltage offset   # Clock Voltages: DET.CLDC.CLKHINM1 "clk1Hi"; # Name DET.CLDC.CLKHI1 3.000; # Setup value DET.CLDC.CLKHIGN1 1.0; # Gain (optional) DET.CLDC.CLKHIRA1 "[-9.000, 9.000]"; # Allowed range DET.CLDC.CLKLONM1 "clk1Lo"; # Name DET.CLDC.CLKLO1 0.000; # Setup value DET.CLDC.CLKLOGN1 1.0; # Gain (optional) DET.CLDC.CLKLORA1 "[-9.000, 9.000]"; # Allowed range # Up to 18 clock voltages like this ... # DC Voltages: DET.CLDC.DCNM1 "DC1"; # Name DET.CLDC.DC1 0.000; # Setup value DET.CLDC.DCGN1 1.0; # Gain (optional) DET.CLDC.DCRA1 "[-9.000, 9.000]"; # Allowed range # Up to 20 DC-voltages like this ...

Clock Pattern Generation The clock pattern blocks define sequences of clock states, which are stored in a RAM inside the NGC sequencer hardware. The bits in the RAM define the state of each physical clock line plus: Some control bits (“wait-for-trigger”, “end-of-pattern”). The duration of each state (dwell time) is defined in the state itself.  PATRAM Pattern RAM High Pattern RAM Low … + 0: 00000000000001010001000000000000 00000000000000000000000000000000 State 1 … + 1: 00000000000001010001000000000001 00000000000000000000000000000100 State 2 … + 2: 00000000000001010001000000000001 00000000000000000000000000000100 State 3 : … +(n-1): 10000000000001010001000000000000 00000000000000000000000000000000 State n … + n: 00000000000001010001000000000000 00000000000000000000000000000000 State 1 … +(n+1): 00000000000001010001000000000001 00000000000000000000000000000100 State 2 … +(n+2): 00000000000001010001000000000001 00000000000000000000000000000100 State 3 … +(n+m-1): 10000000000001010001000000000000 00000000000000000000000000000000 State m ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ 64 60 56 52 48 44 40 36 32 28 24 20 16 12 8 4 1 Clock Pattern 1 Pattern 2 End of Pattern

Clock Pattern ASCII-Format # Clock mapping (can be spread over several lines) # This maps the clocks described below onto physical clock lines. # Mechanism is: Phys. clock line for logical clock n = MAP[n]. DET.CLK.MAP1 "1,2,3,33"; # Mapping list DET.CLK.MAP2 "37,4"; # Mapping list # Clock pattern definitions DET.PAT1.NAME “FrameStart"; DET.PAT1.NSTAT 5; DET.PAT1.CLK1 "00000"; DET.PAT1.CLK2 "00000"; DET.PAT1.CLK3 "00000"; DET.PAT1.CLK4 "00000"; # Convert DET.PAT1.CLK5 "00110"; # Start pulse DET.PAT1.CLK6 "00000"; DET.PAT1.DTV "2,2,2,2,2"; # Dwell-Time vector DET.PAT1.DTM "0,0,0,0,0"; # Dwell-Time modification flags   DET.PAT2.NAME “ReadPix"; DET.PAT2.NSTAT 6; DET.PAT2.CLK1 "000111"; DET.PAT2.CLK2 “111000"; DET.PAT2.CLK3 "000000"; DET.PAT2.CLK4 "000010"; # Convert DET.PAT2.CLK5 "000000"; # Start pulse DET.PAT2.CLK6 "000000"; DET.PAT2.DTV "5,5,5,5,5,5"; # Dwell-Time vector DET.PAT2.DTM "1,1,1,1,1,1"; # Dwell-Time modification flags # Up to 2048 clock pattern blocks in this format...

Sequencer Programming The sequencer program defines the order of execution of the defined clock pattern blocks. Simple 7-instruction code RAM. Easy to get compiled. Address : Pattern-RAM HI Pattern-RAM LO BIT [31..0] BIT [31..0] PATRAM+ 0: PATRAM+ 1: PATRAM+ 2: PATRAM+ 3: PATRAM+ 4: PATRAM+ 5: PATRAM+ 6: PATRAM+ 7: PATRAM+ 8: PATRAM+ 9: PATRAM+10: PATRAM+11: PATRAM+12: PATRAM+13: PATRAM+14: PATRAM+15: PATRAM+16: PATRAM+17: PATRAM+18: : Clock-Pattern Block 1 Block 2 Block 3 Block 4 Address : <Instruction> <Rep> <Address> BIT [30..28] [26..11] [10..0] SEQRAM+0: [LOOP] [N] [-] SEQRAM+1: [EXEC] [N] [PATRAM offset] SEQRAM+2: [LOOP] [N] [-] SEQRAM+3: [EXEC] [N] [PATRAM offset] SEQRAM+4: [LOOPEND] [-] [-] SEQRAM+5: [JSR] [-] [SEQRAM offset] SEQRAM+6: [LOOPEND] [-] [-] SEQRAM+7: [EXIT] [-] [-] : … +offset : [EXEC] [N] [PATRAM offset] … +offset+1: [EXEC] [N] [PATRAM offset] … +offset+2: [RETURN] [-] [-] [LOOP] = 010 [JSR] = 101 [EXEC] = 001 [LOOPINF] = 100 [RETURN] = 110 [EXIT] = 000 [LOOPEND] = 011

Sequencer Program Language The sequencer programs are fully driven by setup parameters (e.g. integration time, number of integrations, window parameters, …). Support of arithmetic expression evaluation (TCL-syntax) to derive any program-loop parameter from the setup parameters and to compute attributes like exposure time estimation and minimum DIT. Support of sub-routines and include-files to minimize the code length. New feature: IF-ELSE instruction in the program code The instruction is not executed at run-time but defines the code to be loaded into the RAM (Pre-Processor). The program complexity can be scaled: Simply do not “USE” any setup parameter. Simply omit the “SCRIPT” part for arithmetic expression evaluation.

Sequencer Program Example # PATTERN DECLARATION GLOBAL_RESET = 14 # PARAMETER DECLARATION USE DET.NDIT DET.SEQ.DIT DET.DITDELAY DET.NDITSKIP # SUBROUTINE DECLARATION SUBRT RESET DELAY FRAME # EVALUATE SCRIPT if {$svar(DET.NDIT) <= 0} { set svar(DET.NDIT) 1 } set tr [expr {$time_r(RESET) / 1000.0}] set tf [expr {$time_r(FRAME) / 1000.0}] set td [expr {$time_r(DELAY) / 1000.0}] set svar(DET.SEQ.MINDIT) $tf set t1 [expr {($svar(DET.NDIT) + $svar(DET.NDITSKIP))}] set svar(delFac) [expr {round(($svar(DET.SEQ.DIT) - $tf) / $td)}] set svar(ditDelay) [expr {round($svar(DET.DITDELAY) / $td)}] if {$svar(delFac) < 0} { set svar(delFac) 0 set svar(DET.SEQ.DIT) $svar(DET.SEQ.MINDIT) set svar(globRst) 0 set svar(DET.SEQ.EXPTIME) [expr {($t1 * ($tr + ($svar(ditDelay)*$td) + ($svar(delFac)*$td) + ($tf*2)))}] SCRIPT_END # EXECUTE LOOP INFINITE IF $svar(globRst) EXEC GLOBAL_RESET 64 ELSE JSR RESET ENDIF JSR DELAY $ditDelay JSR FRAME JSR DELAY $delFac END RETURN # SUBROUTINES RESET: INCLUDE "Hawaii2RGReset.seq" DELAY: INCLUDE "Hawaii2RGDelay.seq" FRAME: INCLUDE "Hawaii2RGFrame.seq"

External Synchronization Synchronization points can be inserted at any place in any clock pattern executed by the sequencer program (i.e. set the “wait-for-trigger” bit in the particular state). When reaching such a point, the pattern execution is suspended after the dwell-time of this state until the arrival of an external trigger signal. Example: # Clock mapping (can be spread over several lines). # This maps the clocks described below onto physical clock lines. # Mechanism is: Phys. clock line for logical clock n = MAP[n]. DET.CLK.MAP1 "1,2,3,33"; # Mapping list DET.CLK.MAP2 "37,4,61"; # Mapping list   # Clock pattern definitions DET.PAT1.NAME “FrameStartSync"; DET.PAT1.NSTAT 5; DET.PAT1.CLK1 "00000"; DET.PAT1.CLK2 "00000"; DET.PAT1.CLK3 "00000"; DET.PAT1.CLK4 "00000"; # Convert DET.PAT1.CLK5 "00110"; # Start pulse DET.PAT1.CLK6 "00000"; DET.PAT1.CLK7 “10000"; # Sync DET.PAT1.DTV "2,2,2,2,2"; # Dwell-Time vector DET.PAT1.DTM "0,0,0,0,0"; # Dwell-Time modification flags Wait for Trigger

Data Acquisition Processes Multi-threaded pre-processing framework: Capture (DMA, circular buffer) Process (Averaging, Least-Square-Fit, Fowler-Pairs, Pixel-Demultiplexing, Digital Filters, …) Transfer – e.g.: Transfer “INT”-frames to IWS for FITS-file Transfer “DIT”-frames to on or more RTDs One executable process per read-out mode. Sustained DMA-transfer supporting multiple DMA-channels (multiplexed or parallel). Parallel processing (partitioned or pipelined). CPU-affinity control. RT-preemptive thread scheduling capability (if enabled in the kernel!). Template Processes have been developed, which are an easy-to-use and stand-alone tool to visualize NGC raw-data on the RTD. Standard acquisition processes for the ESO Standard IR Detectors (HAWAII 1Kx1K, HAWAII2-RG 2Kx2K, SAPHIRA, AQUARIUS, …) are available within the NGC software package. Special setups (e.g. mosaics) may require special software modules. One acquisition process for the AO-NGC (CCD220). This is used for tests, evaluations and calibrations. Real-time simulation capabilities serving for system dimensioning.

Data Interface User-definable Frame-Types (DIT, STDEV, HCYCLE, intermediate results…). The types can be selected to be generated and/or stored during an “exposure”. Exposure Break-Conditions can be set per “per frame-type”. This is the number of frames of a certain type to be stored during the exposure. The exposure terminates when all break- conditions are met. A zero value indicates to store as much as possible frames of that type until all other break-conditions are met. FITS-Files Wait for exposure termination and read the generated FITS-file(s). Default data format is “Image Extension”. Data Cubes for fast data acquisitions. Minimum overhead One cube per frame-type Single files For detector tests in the lab To optimize merging process: start merging already before exposure is completed (e.g. VISTA-instrument). Direct connection to the acquisition process (e.g. RTD) Retrieve the binary image data with just minimum header information (dimension, type, sequential number). Post-Processing Call-Back The control server calls a user-defined procedure before the frame is stored.

NGCSW + VLTSW NGCSW on LLCU NGCSW on IWS VLTSW-RELEASE On the LLCUs the NGC Base-SW only needs the Kernel, the Compiler and the Makefile. The NGCSW-trunk is backwards compatible up to VLTSW release FEB2006 (i.e. it compiles, installs and runs without any performance penalty). Since VLT2013 a 64-bit kernel is provided. On LLCUs with large memory installed this increases the maximum data burst length (e.g. for Queue Mode). The VLSTW version on LLCU and IWS may differ without having any impact on the system behavior. The NGCSW version on LLCU and on IWS should be the same. Caution: typically the NGCSW delivered in the $VLTROOT is outdated! New read-out features (frequent) New config-/setup-keywords to switch between modes (frequent) Bug fixes (less frequent… ) New maintenance tools (device-check, self-test, stress-test,…) Then you have to patch… Linux Kernel + Runtime Environments (C, C++, Tcl/Tk, Java, Python, …) Compiler (gcc) Makefile NGCSW on LLCU NGCSW on IWS VLT – Software Libraries(lib) Executables(bin) Include Files(include) Configuration Files (config, dbl, CDT) VLTSW-RELEASE 2006/2008/2010/2011/2013/2014/…

Installing a Patch Official patches are delivered as new RPM. For quick fixes there is a quick alternative: Login Create an INTROOT (if not yet existing) getTemplateForDirectory INTROOT $INTROOT [1 second] Retrieve NGC package cd /tmp svn co {URL as provided for the patch} [5 seconds] Build… cd /tmp/NGC make man all install [3-4 minutes] Install device driver (if indicated) cd /tmp/NGC/ngcdrv/src make driver [5 seconds] [enter root-password when being asked for it] Just about 5 minutes per detector workstation… When patching an instrument workstation then a database rebuild may be required. This may take a bit longer – depending on the complexity of the database structure.

NGC Device-Check-Tool The utility checks the NGC PCIexpress interface device and displays the link-status. If the link is up then the tool tries to explore the DFE board configuration. Two variants available: Shell command to be executed on the NGC-LLCU when the SW is off-line: ngcbCheckDev [device name] Command to be sent to the DCS control server when the SW is in “LOADED” state. ngcbCmd “checkdev [device number]” msgSend “” ngcircon EXEC “checkdev [device number]” “Menu-Button” in the ngcgui. This takes into account the device names and LLCU host names as defined in the DCS system configuration file. The tools work both with and without NGC-PMC board in the chain.

Data Cube Player The NGC-SW provides a maintenance tool to playback multi-dimensional FITS-files (data-cubes, NAXIS=3). The player (ngcbCube2Rtd) can be launched from the ngcrtdGui menu. It can either be operated manually or it automatically plays the image slices at selectable speed.

Frequently Asked Questions The NGC-DCS maintains a list of Frequently Asked Questions (FAQ). The list can be displayed with the “ngcdcsFaq” browsing tool through the “Help → Extended Help” menu button in the graphical user interface. in plain ASCII format: “ngcdcs/config/ngcdcs.faq” When using the browsing tool then the list refers to the software version actually installed.

One of the most frequently asked questions…

Chopping The synchronization of the detector read-out with a chopper device is done via the external trigger input of the sequencer. The chopping mode is enabled or disabled with the setup parameter DET.CHOP.ST (T/F). This will also enable/disable the external trigger input on all sequencer instances. The DET.CHOP.ST parameter enables/disables the chop-cycle-processing in the data acquisition chain whereas the DET.SEQi.TRIGGER parameter just enables/disables the “wait-for-trigger” states in the sequencer program. Chopper synchronization can be done per phase transition or per read-out or per detector integration cycle (i.e. per “DIT”). Chopper VLT-TIM NGC-Sequencer Trigger Start-Time, Frequency Start-Time, Period DET.CHOP.TIM Transition-Time Detector Integration Time Read-Speed Chopping Parameters: DET.NDIT DET.NDITSKIP DET.CHOP.NCYCLES DET.CHOP.CYCSKIP DET.DITDELAY,… NGCIRSW OS

Synchronize per Phase Transition The minimum value for the INS.TIMi.PERIOD is computed by the sequencer program and is stored in the parameter DET.CHOP.TIM. The computed value can either be retrieved via STATUS command or via the database attribute ‘<alias>ngcircon:chopper.tim’ A margin (“+Tx”) is needed to compensate rounding errors in the TIM software. When the trigger pulse (red) falls into the pattern execution area (green) then the pulse is missed and only every second trigger comes through (self-subtraction). DIT MINDIT Chopper Period Reset Read1 Delay Read2 X Pattern Execution Block {NDIT = 4} DET.CHOP.TIM =1 / (2 x DET.CHOP.FREQ) {NDITSKIP = 1} Margin (“+ Tx”) INS.TIMi.PERIOD

Synchronize per Read-Out One trigger signal is delivered per detector read-out. Typically this mechanism is used in the so-called “Uncorrelated” (or “Rolling”) read-out modes. The detector integration time (DIT) is directly set via the TIM. It is always equal to INS.TIMi.PERIOD. When applying the minimum DIT (i.e. DIT=MINDIT) then still a margin (“+ Tx”) is needed to compensate rounding errors in the TIM software. When the trigger pulse (red) falls into the pattern execution area (green) then the pulse is missed and only every second trigger comes through. The exposure will then take twice as long as expected. The DET.SEQi.DIT parameter should always be set to INS.TIMi.PERIOD in order to finally have the right value in the FITS header. NGC-DCS has no access to the value of INS.TIMi.PERIOD! Read+Reset DIT MINDIT INS.TIMi.PERIOD Margin (“+ Tx”) RdRst Chopper Period {NDIT = 4} {NDITSKIP = 1}

Pattern Execution Block Synchronize per DIT One trigger signal is delivered at the start of each detector integration cycle. Typically this mechanism is used for the “Double-Correlated” (or “CDS”) read-out modes and for the non-destructive modes (“Least Square Fit” or “Fowler”). The detector integration time (DIT) is not equal to INS.TIMi.PERIOD. The integration time is set via the DET.SEQi.DIT parameter which causes the sequencer program to execute delay patterns of appropriate length. The second read-out (“Read2”) and the reset pattern (“Reset”) add to the length of the pattern execution block (“X”). There may be more even more delay patterns (e.g. DET.DITDLEAY between “Reset” and “Read1”). The NGC‑TIM signal does not trigger the array read‑out but it triggers the execution of a pattern execution block. Again a margin (“+ Tx”) is needed to avoid that due to TIM software internal rounding the trigger pulse (red) falls into the pattern execution block (green). DIT MINDIT INS.TIMi.PERIOD X Chopper Period {NDIT = 4} {NDITSKIP = 1} Reset Read1 Delay Read2 DET.CHOP.TIM Margin (+Tx) Pattern Execution Block

The End Documentation VLT-MAN-ESO-13660-4085 Repository “New General Detector Controller - Infrared Detector Control Software – User Manual” The latest (but possibly not yet released) version is always stored here: http://svnhq1.hq.eso.org/p1/trunk/Documents/VLT/MAN/VLT-MAN-ESO-13660-4085/VLT-MAN-ESO-13660-4085.pdf Repository Trunk: http://svnhq1.hq.eso.org/p1/trunk/Detectors/NGC/PKG/NGC Tags: http://svnhq1.hq.eso.org/p1/tags/RC/NGC/NGC-<#>